{"id":"https://openalex.org/W2537556459","doi":"https://doi.org/10.1109/issoc.2003.1267728","title":"Using a communication generator in SoC architecture exploration","display_name":"Using a communication generator in SoC architecture exploration","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W2537556459","doi":"https://doi.org/10.1109/issoc.2003.1267728","mag":"2537556459"},"language":"en","primary_location":{"id":"doi:10.1109/issoc.2003.1267728","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2003.1267728","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090863671","display_name":"Tero Kangas","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":true,"raw_author_name":"T. Kangas","raw_affiliation_strings":["Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"affiliations":[{"raw_affiliation_string":"Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040018112","display_name":"Jouni Riihim\u00e4ki","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Riihimaki","raw_affiliation_strings":["Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"affiliations":[{"raw_affiliation_string":"Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078390067","display_name":"Erno Salminen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"E. Salminen","raw_affiliation_strings":["Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"affiliations":[{"raw_affiliation_string":"Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010907476","display_name":"Kimmo Kuusilinna","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"K. Kuusilinna","raw_affiliation_strings":["Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"affiliations":[{"raw_affiliation_string":"Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102937415","display_name":"Timo D. H\u00e4m\u00e4l\u00e4inen","orcid":"https://orcid.org/0000-0002-7867-0800"},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"T.D. Hamalainen","raw_affiliation_strings":["Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland"],"affiliations":[{"raw_affiliation_string":"Institute ofDigital and Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5090863671"],"corresponding_institution_ids":["https://openalex.org/I4210133110"],"apc_list":null,"apc_paid":null,"fwci":2.3697,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.88620645,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"105","last_page":"108"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7967456579208374},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6632104516029358},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.6012517809867859},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5706000924110413},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5696754455566406},{"id":"https://openalex.org/keywords/database-transaction","display_name":"Database transaction","score":0.5084871053695679},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4810252785682678},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4535965323448181},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.41735056042671204},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1224856972694397},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.10978037118911743}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7967456579208374},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6632104516029358},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.6012517809867859},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5706000924110413},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5696754455566406},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.5084871053695679},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4810252785682678},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4535965323448181},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.41735056042671204},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1224856972694397},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.10978037118911743},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/issoc.2003.1267728","is_oa":false,"landing_page_url":"https://doi.org/10.1109/issoc.2003.1267728","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1550131357","https://openalex.org/W1597755753","https://openalex.org/W1651131057","https://openalex.org/W2043918852","https://openalex.org/W2115121632","https://openalex.org/W2139522402","https://openalex.org/W2140634112","https://openalex.org/W2145930857","https://openalex.org/W2147291108","https://openalex.org/W2151415616","https://openalex.org/W2154317164","https://openalex.org/W2169396089","https://openalex.org/W4205317033","https://openalex.org/W4232490216","https://openalex.org/W6635964534","https://openalex.org/W7043665758"],"related_works":["https://openalex.org/W2502691491","https://openalex.org/W3142211975","https://openalex.org/W1879443270","https://openalex.org/W2018912978","https://openalex.org/W2119122672","https://openalex.org/W2130914040","https://openalex.org/W2136848245","https://openalex.org/W1978899622","https://openalex.org/W4292904049","https://openalex.org/W4213404769"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"implementation":[4],"of":[5,51,76],"a":[6,35,47],"communication":[7,78],"generator,":[8],"named":[9],"transaction":[10,66],"generator.":[11],"It":[12],"is":[13,23,44,55],"utilized":[14],"in":[15,71],"communication-centric":[16],"SoC":[17],"architecture":[18,54,64],"exploration":[19],"where":[20],"the":[21,26],"objective":[22],"to":[24,62],"find":[25],"optimal":[27],"hardware":[28],"allocation,":[29],"task":[30],"partitioning,":[31],"and":[32,39,53,74],"scheduling":[33],"with":[34,46,57],"given":[36],"application":[37,43],"model":[38,50],"architectural":[40],"requirements.":[41],"An":[42],"abstracted":[45],"process":[48],"network":[49],"computation":[52],"described":[56],"characteristic":[58],"metrics.":[59],"In":[60],"addition":[61],"accelerating":[63],"exploration,":[65],"generator":[67],"can":[68],"be":[69],"used":[70],"development,":[72],"verification":[73],"comparison":[75],"on-chip":[77],"networks.":[79]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
