{"id":"https://openalex.org/W7133318071","doi":"https://doi.org/10.1109/isscc49663.2026.11408963","title":"A 0.65-to-1V-V <sub>DD</sub> 10.5-to-11.85GHz Fractional-N Sampling PLL Achieving 71.47fs Integrated Jitter and &lt;-60dBc Near-Integer Fractional Spur in 40nm CMOS","display_name":"A 0.65-to-1V-V <sub>DD</sub> 10.5-to-11.85GHz Fractional-N Sampling PLL Achieving 71.47fs Integrated Jitter and &lt;-60dBc Near-Integer Fractional Spur in 40nm CMOS","publication_year":2026,"publication_date":"2026-02-15","ids":{"openalex":"https://openalex.org/W7133318071","doi":"https://doi.org/10.1109/isscc49663.2026.11408963"},"language":null,"primary_location":{"id":"doi:10.1109/isscc49663.2026.11408963","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc49663.2026.11408963","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020534130","display_name":"Yixi Cai Lili lei Lei Li","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yixi Li","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068125288","display_name":"\u9648\u4fca\u6770","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junjie Chen","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127989162","display_name":"Xinyu Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinyu Shen","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100404947","display_name":"Jie Yang","orcid":"https://orcid.org/0000-0003-4801-7162"},"institutions":[{"id":"https://openalex.org/I3133055985","display_name":"Westlake University","ror":"https://ror.org/05hfa4n20","country_code":"CN","type":"education","lineage":["https://openalex.org/I3133055985"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jie Yang","raw_affiliation_strings":["Westlake University,Hangzhou,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Westlake University,Hangzhou,China","institution_ids":["https://openalex.org/I3133055985"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127974628","display_name":"Jian Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jian Liu","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110665174","display_name":"Nanjian Wu","orcid":"https://orcid.org/0000-0001-8022-0262"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Nanjian Wu","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101867714","display_name":"Zheng Zhang","orcid":"https://orcid.org/0009-0002-8689-0763"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhao Zhang","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100409387","display_name":"Linlin Liu","orcid":"https://orcid.org/0000-0002-1058-4551"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Liyuan Liu","raw_affiliation_strings":["Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China","institution_ids":["https://openalex.org/I4210149211","https://openalex.org/I19820366"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.25941061,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"218","last_page":"220"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9783999919891357,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9783999919891357,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.009200000204145908,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.004900000058114529,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dither","display_name":"Dither","score":0.8363000154495239},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7851999998092651},{"id":"https://openalex.org/keywords/spur","display_name":"Spur","score":0.7720999717712402},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.6717000007629395},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6694999933242798},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.588699996471405},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5511000156402588},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.5501999855041504}],"concepts":[{"id":"https://openalex.org/C70451592","wikidata":"https://www.wikidata.org/wiki/Q376493","display_name":"Dither","level":3,"score":0.8363000154495239},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7851999998092651},{"id":"https://openalex.org/C2779821383","wikidata":"https://www.wikidata.org/wiki/Q7581537","display_name":"Spur","level":2,"score":0.7720999717712402},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6722000241279602},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6717000007629395},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6694999933242798},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.588699996471405},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5695000290870667},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5511000156402588},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.5501999855041504},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4763000011444092},{"id":"https://openalex.org/C2777303404","wikidata":"https://www.wikidata.org/wiki/Q759757","display_name":"Convergence (economics)","level":2,"score":0.4108000099658966},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.35089999437332153},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3476000130176544},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32600000500679016},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.32019999623298645},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.3172000050544739},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.2824999988079071},{"id":"https://openalex.org/C13944312","wikidata":"https://www.wikidata.org/wiki/Q7512748","display_name":"Signal-to-noise ratio (imaging)","level":2,"score":0.2775000035762787},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.2533000111579895}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc49663.2026.11408963","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc49663.2026.11408963","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.43638455867767334,"display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G4642101471","display_name":null,"funder_award_id":"62174153,62222409","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2133079932","https://openalex.org/W2901368319","https://openalex.org/W2972420192","https://openalex.org/W3138043821","https://openalex.org/W4385453497","https://openalex.org/W4391892585","https://openalex.org/W4392746293","https://openalex.org/W4406458544"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"0.65-to-<tex":[4],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[5,11,42,48,70],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$1":[6],"\\mathrm{V},":[7],"10.5$</tex>-to-11.85":[8],"GHz":[9],"wide-<tex":[10],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\mathrm{V}_{\\text{DD}}$</tex>-range":[12],"(WV)":[13],"fractional-N":[14],"sampling":[15],"PLL.":[16],"The":[17,58],"QE-reduction":[18],"WV":[19],"SPD,":[20],"high-linearity":[21],"2-stage":[22],"DTC,":[23],"and":[24,51,68],"DCC-aided":[25],"QE":[26],"dithering":[27],"method":[28],"are":[29],"proposed":[30],"to":[31],"address":[32],"the":[33],"issue":[34],"of":[35],"poor":[36],"phase":[37],"noise":[38],"at":[39,45,54],"low":[40],"<tex":[41,47,69],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\mathrm{V}_{\\text{DD}}$</tex>,":[43,49],"reliability":[44],"regular":[46],"nonlinearity,":[50],"convergence":[52],"issues":[53],"small":[55],"fractional":[56],"FCWs.":[57],"40":[59],"nm":[60],"prototype":[61],"achieves":[62],"71.47fs":[63],"jitter,":[64],"\u2212251.8":[65],"dB":[66],"FoM,":[67],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$&lt;-60":[71],"\\text{dBc}$</tex>":[72],"near-integer":[73],"spur.":[74]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-03-04T00:00:00"}
