{"id":"https://openalex.org/W4408183204","doi":"https://doi.org/10.1109/isscc49661.2025.10904657","title":"29.2 A $\\boldsymbol{0.021}\\boldsymbol{\\mu}\\mathbf{m^{2}}$ High-Density SRAM in Intel-18A-RibbonFET Technology with PowerVia-Backside Power Delivery","display_name":"29.2 A $\\boldsymbol{0.021}\\boldsymbol{\\mu}\\mathbf{m^{2}}$ High-Density SRAM in Intel-18A-RibbonFET Technology with PowerVia-Backside Power Delivery","publication_year":2025,"publication_date":"2025-02-16","ids":{"openalex":"https://openalex.org/W4408183204","doi":"https://doi.org/10.1109/isscc49661.2025.10904657"},"language":"en","primary_location":{"id":"doi:10.1109/isscc49661.2025.10904657","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc49661.2025.10904657","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108150784","display_name":"Xiaofei Wang","orcid":"https://orcid.org/0000-0003-1489-196X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaofei Wang","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101688825","display_name":"Yusung Kim","orcid":"https://orcid.org/0000-0002-4051-3789"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yusung Kim","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5116535539","display_name":"Gwang Hyeon Baek","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gwang Hyeon Baek","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5094136749","display_name":"Kunal Girish Bannore","orcid":"https://orcid.org/0009-0003-8954-3350"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kunal Girish Bannore","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Kaushal Dave","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushal Dave","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032437900","display_name":"Arash Joushaghani","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arash Joushaghani","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Narae Kang","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Narae Kang","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109256005","display_name":"Myoung Sam Ko","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Minwoo Ko","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077144575","display_name":"Anandkumar Mahadevan Pillai","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anandkumar Mahadevan Pillai","raw_affiliation_strings":["Intel,Santa Clara,CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Santa Clara,CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5116535538","display_name":"Hema Chandra Prakash Movva","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hema Chandra Prakash Movva","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009547029","display_name":"Gyusung Park","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gyusung Park","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047548892","display_name":"Muktadir Rahman","orcid":"https://orcid.org/0000-0001-5152-8276"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Muktadir Rahman","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Seenivasan Subramaniam","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Seenivasan Subramaniam","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020148365","display_name":"Vinay Vashishtha","orcid":"https://orcid.org/0000-0001-6017-6399"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vinay Vashishtha","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Teng Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Teng Yang","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007891380","display_name":"Zheng Guo","orcid":"https://orcid.org/0000-0001-8615-9749"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zheng Guo","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053857493","display_name":"Eric Karl","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eric A Karl","raw_affiliation_strings":["Intel,Hillsboro,OR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel,Hillsboro,OR","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":34.7042,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.9984794,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"494","last_page":"496"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6680288910865784},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.5459607243537903},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4433683454990387},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21471473574638367},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12083965539932251},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.08746695518493652}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6680288910865784},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.5459607243537903},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4433683454990387},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21471473574638367},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12083965539932251},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.08746695518493652}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc49661.2025.10904657","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc49661.2025.10904657","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2789659455","https://openalex.org/W3134817854","https://openalex.org/W4313203552","https://openalex.org/W4385192500","https://openalex.org/W4385192573"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2935759653","https://openalex.org/W3105167352","https://openalex.org/W54078636","https://openalex.org/W2954470139","https://openalex.org/W1501425562","https://openalex.org/W2902782467","https://openalex.org/W3084825885","https://openalex.org/W2298861036","https://openalex.org/W2271181815"],"abstract_inverted_index":{"The":[0,53,86],"accelerating":[1],"pursuit":[2],"of":[3,71,101],"high-performance":[4],"and":[5,15,32,61,108,141,148,170,203],"energy-efficient":[6],"computing":[7],"drives":[8],"recent":[9],"breakthroughs":[10],"in":[11,18,38,49],"both":[12,168],"semiconductor":[13],"devices":[14],"power-delivery":[16],"schemes":[17],"advanced":[19],"process":[20],"technologies.":[21],"This":[22],"paper":[23],"presents":[24],"industry's":[25],"first":[26],"volume":[27],"silicon":[28],"validated":[29],"high-current":[30],"(HCC)":[31],"high-density":[33],"(HDC)":[34],"6T":[35],"SRAM":[36,79,137,197],"implemented":[37],"a":[39,175,184],"RibbonFET":[40,54,136,150],"technology":[41,48,55,88],"incorporating":[42],"backside":[43,100],"power":[44,96,106],"delivery":[45,97],"using":[46,132,194],"PowerVia":[47,87],"the":[50,68,72,99,102,116,134,159],"peripheral":[51,123,205],"circuits.":[52],"offers":[56],"better":[57],"performance":[58,84],"per":[59],"watt":[60],"improved":[62],"density;":[63],"it":[64],"also":[65],"allows":[66],"for":[67,82,95,146],"flexible":[69],"adjustment":[70],"effective":[73],"transistor":[74,80],"width":[75],"to":[76,119,127,162,187],"achieve":[77],"optimal":[78],"sizing":[81],"power,":[83],"and$\\mathrm{V}_{\\text{MIN}}$.":[85],"[1]\u2013[3]":[89],"features":[90],"low":[91],"resistance":[92],"metal":[93],"layers":[94],"on":[98,115],"wafer":[103],"that":[104,166],"reduces":[105],"droop":[107],"frees":[109],"up":[110],"additional":[111,204],"signal":[112],"routing":[113],"resources":[114],"frontside":[117],"interconnects":[118],"enable":[120],"more":[121],"efficient":[122],"circuit":[124,206],"design.":[125],"Compared":[126],"similar":[128],"designs":[129,165],"[3],":[130],"[4]":[131],"FinFETs,":[133],"proposed":[135],"design":[138],"achieves":[139],"0.77x":[140],"0.88x":[142],"bitcell":[143],"area":[144],"scaling":[145],"HCC":[147,151],"HDC.":[149],"measurements":[152],"demonstrate":[153],"an":[154,195],"improved$\\mathrm{V}_{\\text{MIN}}$without":[155],"assist":[156,172,180],"circuitry":[157],"at":[158],"90thpercentile,":[160],"compared":[161,186],"prior":[163,188],"FinFET-based":[164],"required":[167],"read":[169],"write":[171,179],"circuitry.":[173],"With":[174],"negative":[176],"bitline":[177],"(NBL)":[178],"the$34.3\\text{Mb}/\\text{mm}^{2}$HDC":[181],"array":[182,201],"demonstrates":[183],"68mV$\\mathrm{V}_{\\text{MIN}}$improvement,":[185],"designs.":[189],"Up":[190],"to$38.1\\":[191],"\\text{Mb}/\\text{mm}^{2}$is":[192],"achieved":[193],"HDC":[196],"with":[198],"larger":[199],"bit":[200],"configuration":[202],"compaction.":[207]},"counts_by_year":[{"year":2026,"cited_by_count":6},{"year":2025,"cited_by_count":4}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}