{"id":"https://openalex.org/W4392746372","doi":"https://doi.org/10.1109/isscc49657.2024.10454463","title":"15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture","display_name":"15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture","publication_year":2024,"publication_date":"2024-02-18","ids":{"openalex":"https://openalex.org/W4392746372","doi":"https://doi.org/10.1109/isscc49657.2024.10454463"},"language":"en","primary_location":{"id":"doi:10.1109/isscc49657.2024.10454463","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc49657.2024.10454463","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029783577","display_name":"Masaru Haraguchi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Masaru Haraguchi","raw_affiliation_strings":["TSMC Design Technology Japan,Yokohama,Japan","TSMC Design Technology Japan, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC Design Technology Japan,Yokohama,Japan","institution_ids":[]},{"raw_affiliation_string":"TSMC Design Technology Japan, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078086871","display_name":"Yorinobu Fujino","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yorinobu Fujino","raw_affiliation_strings":["TSMC Design Technology Japan,Yokohama,Japan","TSMC Design Technology Japan, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC Design Technology Japan,Yokohama,Japan","institution_ids":[]},{"raw_affiliation_string":"TSMC Design Technology Japan, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031531908","display_name":"Yoshisato Yokoyama","orcid":"https://orcid.org/0000-0001-8552-4070"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yoshisato Yokoyama","raw_affiliation_strings":["TSMC Design Technology Japan,Yokohama,Japan","TSMC Design Technology Japan, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC Design Technology Japan,Yokohama,Japan","institution_ids":[]},{"raw_affiliation_string":"TSMC Design Technology Japan, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054699684","display_name":"Ming\u2010Hung Chang","orcid":"https://orcid.org/0009-0003-8319-3927"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ming-Hung Chang","raw_affiliation_strings":["TSMC,Hsinchu,Taiwan","TSMC, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102914090","display_name":"Yu-Hao Hsu","orcid":"https://orcid.org/0000-0002-3165-1960"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Hao Hsu","raw_affiliation_strings":["TSMC,Hsinchu,Taiwan","TSMC, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102615711","display_name":"Hong-Chen Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hong-Chen Cheng","raw_affiliation_strings":["TSMC,Hsinchu,Taiwan","TSMC, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047952713","display_name":"Koji Nii","orcid":"https://orcid.org/0000-0002-9986-5308"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Koji Nii","raw_affiliation_strings":["TSMC Design Technology Japan,Yokohama,Japan","TSMC Design Technology Japan, Yokohama, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC Design Technology Japan,Yokohama,Japan","institution_ids":[]},{"raw_affiliation_string":"TSMC Design Technology Japan, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066037916","display_name":"Yih Wang","orcid":"https://orcid.org/0000-0002-4580-2870"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yih Wang","raw_affiliation_strings":["TSMC,Hsinchu,Taiwan","TSMC, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5114087240","display_name":"Tsung-Yung Jonathan Chang","orcid":"https://orcid.org/0009-0007-6505-5474"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsung-Yung Jonathan Chang","raw_affiliation_strings":["TSMC,Hsinchu,Taiwan","TSMC, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TSMC,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"TSMC, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.6355,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.9497294,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"280","last_page":"282"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7130056023597717},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.5157261490821838},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4983649253845215},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4392530620098114},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3789440095424652},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3729932904243469},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3639744520187378},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32223784923553467},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21911469101905823}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7130056023597717},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.5157261490821838},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4983649253845215},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4392530620098114},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3789440095424652},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3729932904243469},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3639744520187378},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32223784923553467},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21911469101905823},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc49657.2024.10454463","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc49657.2024.10454463","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1984849261","https://openalex.org/W2526294058","https://openalex.org/W2752340955","https://openalex.org/W2791748601","https://openalex.org/W4385212177","https://openalex.org/W4385212700"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W4392590355","https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W1976168335","https://openalex.org/W2109451123","https://openalex.org/W4378977321","https://openalex.org/W3211992815"],"abstract_inverted_index":{"An":[0],"embedded":[1,48],"2-port":[2,66,112],"(dual-port)":[3],"SRAM":[4,49,129,160],"is":[5,44,89,102,115,135],"one":[6,97],"of":[7,153,159],"the":[8],"major":[9],"challenges":[10],"to":[11,39,52,94,96,109],"achieve":[12],"maximum":[13],"frequency":[14],"(fMAX)":[15],"operation":[16],"and":[17,33,84,100,120,150],"memory":[18],"cell":[19],"density":[20],"for":[21,91,144],"high-performance":[22],"computing":[23],"(HPC)":[24],"applications:":[25],"such":[26],"as":[27,139],"massively":[28],"parallel-processing,":[29],"imaging,":[30],"video":[31],"graphics,":[32],"deep-learning":[34],"AI":[35],"processors.":[36],"In":[37],"addition":[38],"high-speed":[40],"operation,":[41],"area":[42,118],"scaling":[43],"also":[45],"important,":[46],"because":[47],"capacity":[50],"tends":[51],"increase":[53],"with":[54,130],"technology":[55],"nodes,":[56],"occupying":[57],"a":[58,69,103,116,131,136,148],"huge":[59],"portion":[60],"in":[61,141],"recent":[62],"SoC.":[63],"Timing-sliced":[64],"double-pumped":[65,127],"SRAMs,":[67,113],"using":[68],"typical":[70],"single-port":[71],"(SP)":[72],"6T":[73,128],"bit":[74],"cell,":[75],"have":[76],"been":[77],"proposed":[78],"[1\u20134];":[79],"thereby,":[80],"enabling":[81],"consecutive":[82],"read":[83,122],"write":[85],"operations.":[86],"Though":[87],"it":[88],"limited":[90],"both":[92],"ports":[93],"synchronize":[95],"clock":[98],"phase":[99],"there":[101,114],"certain":[104],"cycle":[105],"time":[106,124],"penalty":[107],"compared":[108],"other":[110,157],"8T":[111],"compact":[117],"benefit":[119],"no":[121],"access":[123],"degradation.":[125],"A":[126],"folded-BL":[132],"multi-bank":[133],"architecture":[134,161],"better":[137],"solution":[138],"shown":[140],"Fig.":[142],"15.3.1":[143],"HPC":[145],"systems":[146],"from":[147],"performance":[149],"memory-density":[151],"point":[152],"view,":[154],"rather":[155],"than":[156],"types":[158],"[3\u20136].":[162]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
