{"id":"https://openalex.org/W4221013705","doi":"https://doi.org/10.1109/isscc42614.2022.9731582","title":"A 16nm 785GMACs/J 784-Core Digital Signal Processor Array With a Multilayer Switch Box Interconnect, Assembled as a 2\u00d72 Dielet with 10\u03bcm-Pitch Inter-Dielet I/O for Runtime Multi-Program Reconfiguration","display_name":"A 16nm 785GMACs/J 784-Core Digital Signal Processor Array With a Multilayer Switch Box Interconnect, Assembled as a 2\u00d72 Dielet with 10\u03bcm-Pitch Inter-Dielet I/O for Runtime Multi-Program Reconfiguration","publication_year":2022,"publication_date":"2022-02-20","ids":{"openalex":"https://openalex.org/W4221013705","doi":"https://doi.org/10.1109/isscc42614.2022.9731582"},"language":"en","primary_location":{"id":"doi:10.1109/isscc42614.2022.9731582","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc42614.2022.9731582","pdf_url":null,"source":{"id":"https://openalex.org/S4363607897","display_name":"2022 IEEE International Solid- State Circuits Conference (ISSCC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Solid- State Circuits Conference (ISSCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088809280","display_name":"Uneeb Rathore","orcid":null},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Uneeb Rathore","raw_affiliation_strings":["University of California,Los Angeles,CA","University of California, Los Angeles, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California,Los Angeles,CA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"University of California, Los Angeles, CA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088517633","display_name":"Sumeet Singh Nagi","orcid":"https://orcid.org/0000-0002-7185-1473"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sumeet Singh Nagi","raw_affiliation_strings":["University of California,Los Angeles,CA","University of California, Los Angeles, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California,Los Angeles,CA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"University of California, Los Angeles, CA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091022757","display_name":"Subramanian S. Iyer","orcid":"https://orcid.org/0000-0003-1220-031X"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subramanian Iyer","raw_affiliation_strings":["University of California,Los Angeles,CA","University of California, Los Angeles, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California,Los Angeles,CA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"University of California, Los Angeles, CA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003700236","display_name":"Dejan Markovi\u0107","orcid":"https://orcid.org/0000-0002-6744-7531"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dejan Markovic","raw_affiliation_strings":["University of California,Los Angeles,CA","University of California, Los Angeles, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California,Los Angeles,CA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"University of California, Los Angeles, CA","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I161318765"],"apc_list":null,"apc_paid":null,"fwci":2.7836,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.90930576,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"52","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7250432968139648},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5448434948921204},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5424628257751465},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5351935625076294},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5110486745834351},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.48132383823394775},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4466196298599243},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4427800178527832},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.4215281009674072},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4164431691169739},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.354468435049057},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32742610573768616},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.11680838465690613},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09699472784996033},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08963736891746521}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7250432968139648},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5448434948921204},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5424628257751465},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5351935625076294},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5110486745834351},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.48132383823394775},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4466196298599243},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4427800178527832},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.4215281009674072},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4164431691169739},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.354468435049057},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32742610573768616},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.11680838465690613},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09699472784996033},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08963736891746521},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc42614.2022.9731582","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc42614.2022.9731582","pdf_url":null,"source":{"id":"https://openalex.org/S4363607897","display_name":"2022 IEEE International Solid- State Circuits Conference (ISSCC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Solid- State Circuits Conference (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.800000011920929}],"awards":[],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2791175999","https://openalex.org/W3008954557","https://openalex.org/W3048251492","https://openalex.org/W3161299939"],"related_works":["https://openalex.org/W1604898313","https://openalex.org/W2503642292","https://openalex.org/W1569389315","https://openalex.org/W2130256358","https://openalex.org/W2320205417","https://openalex.org/W2152033542","https://openalex.org/W1975010174","https://openalex.org/W1582111664","https://openalex.org/W2117869698","https://openalex.org/W3139246003"],"abstract_inverted_index":{"The":[0,95,117,135,182],"increasing":[1],"amount":[2],"of":[3,33,38,69,125,207],"dark":[4,21],"silicon":[5],"area":[6,91],"in":[7,76],"power-limited":[8],"SoCs":[9],"makes":[10],"it":[11],"attractive":[12],"to":[13,54,176],"consider":[14],"reconfigurable":[15,41],"architectures":[16],"that":[17,111,168,194],"could":[18],"intelligently":[19],"repurpose":[20],"silicon.":[22],"FPGAs":[23],"are":[24],"more":[25],"efficient":[26],"than":[27],"CPUs,":[28,34],"but":[29],"lack":[30],"temporal":[31],"dynamics":[32],"efficiency":[35,51],"and":[36,56,65,86,92,107,140,146,158],"throughput":[37],"accelerators.":[39],"Coarse-grain":[40],"arrays":[42],"(CGRAs)":[43],"can":[44],"achieve":[45],"higher":[46],"throughput,":[47],"with":[48,89,122],"substantial":[49],"energy":[50,93],"gap":[52],"relative":[53],"accelerators,":[55],"limited":[57],"multi-program":[58,71],"dynamics.":[59,160],"This":[60],"paper":[61],"introduces":[62],"a":[63,99,108,178],"domain-specific":[64],"energy-efficient":[66,189],"(within":[67],"2-10\u00d7":[68],"accelerators)":[70],"runtime-reconfigurable":[72],"784-core":[73],"processor":[74],"array":[75],"16nm":[77],"CMOS.":[78],"Our":[79],"design":[80],"maximizes":[81,112],"generality":[82],"for":[83,142,150],"signal":[84],"processing":[85,126],"linear":[87],"algebra":[88],"minimal":[90],"penalty.":[94],"main":[96],"innovation":[97],"is":[98,120,186],"statistics-driven":[100],"multi-layer":[101],"network":[102,105,119,136,200],"which":[103,129],"minimizes":[104],"delays,":[106],"switch":[109],"box":[110],"connectivity":[113],"per":[114],"hardware":[115],"cost.":[116],"layered":[118],"O(N)":[121],"the":[123,197,205],"number":[124,206],"elements":[127],"N,":[128],"allows":[130],"monolithic":[131],"or":[132],"multi-dielet":[133,183],"scaling.":[134],"features":[137],"deterministic":[138],"routing":[139,199],"timing":[141],"fast":[143],"program":[144,155],"compile":[145],"hardware-resource":[147],"reallocation,":[148],"suitable":[149],"data-driven":[151],"attentive":[152],"processing,":[153],"including":[154],"trace":[156],"uncertainties":[157],"application":[159],"Further,":[161],"this":[162],"work":[163],"demonstrates":[164],"multiple":[165],"functional":[166],"dielets":[167],"have":[169],"been":[170],"integrated":[171],"at":[172],"10\u03bcm":[173],"bump":[174],"pitch":[175],"build":[177],"monolithic-like":[179],"scalable":[180],"design.":[181],"(2\u00d72)":[184],"scaling":[185],"enabled":[187],"by":[188],"high-bandwidth":[190],"inter-dielet":[191],"communication":[192],"channels":[193],"seamlessly":[195],"extend":[196],"intra-die":[198],"across":[201],"dielet":[202],"boundaries,":[203],"quadrupling":[204],"computeresources.":[208]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
