{"id":"https://openalex.org/W3083429320","doi":"https://doi.org/10.1109/isscc19947.2020.9063094","title":"17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking","display_name":"17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking","publication_year":2020,"publication_date":"2020-02-01","ids":{"openalex":"https://openalex.org/W3083429320","doi":"https://doi.org/10.1109/isscc19947.2020.9063094","mag":"3083429320"},"language":"en","primary_location":{"id":"doi:10.1109/isscc19947.2020.9063094","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc19947.2020.9063094","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Solid- State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075806913","display_name":"Alessio Santiccioli","orcid":"https://orcid.org/0000-0002-2301-5702"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessio Santiccioli","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027695549","display_name":"Mario Mercandelli","orcid":"https://orcid.org/0000-0003-0847-9207"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mario Mercandelli","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071532224","display_name":"Luca Bertulessi","orcid":"https://orcid.org/0000-0001-6167-6512"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Bertulessi","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036699269","display_name":"Angelo Parisi","orcid":"https://orcid.org/0000-0003-1397-9011"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Angelo Parisi","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046032176","display_name":"Dmytro Cherniak","orcid":"https://orcid.org/0000-0001-7662-9022"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Dmytro Cherniak","raw_affiliation_strings":["Infineon Technologies, Villach, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051946676","display_name":"Andrea L. Lacaita","orcid":"https://orcid.org/0000-0003-0315-514X"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Leonardo Lacaita","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073514694","display_name":"Carlo Samori","orcid":"https://orcid.org/0000-0002-7084-0721"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Carlo Samori","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085904857","display_name":"Salvatore Levantino","orcid":"https://orcid.org/0000-0003-0895-1700"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Levantino","raw_affiliation_strings":["Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.376,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.98041898,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"268","last_page":"270"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8495854139328003},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8228256702423096},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.657817542552948},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6341110467910767},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5811408162117004},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5611018538475037},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.5132672786712646},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.480576753616333},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22111785411834717},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13677889108657837}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8495854139328003},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8228256702423096},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.657817542552948},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6341110467910767},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5811408162117004},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5611018538475037},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.5132672786712646},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.480576753616333},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22111785411834717},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13677889108657837},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isscc19947.2020.9063094","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc19947.2020.9063094","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Solid- State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},{"id":"pmh:oai:re.public.polimi.it:11311/1141865","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/1141865","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W1492059061","https://openalex.org/W1994184480","https://openalex.org/W2017690880","https://openalex.org/W2022512492","https://openalex.org/W2023401960","https://openalex.org/W2028941857","https://openalex.org/W2105386586","https://openalex.org/W2108185796","https://openalex.org/W2142610168","https://openalex.org/W2175048562","https://openalex.org/W2280601454","https://openalex.org/W2288286056","https://openalex.org/W2342426112","https://openalex.org/W2346049708","https://openalex.org/W2528482522","https://openalex.org/W2577476579","https://openalex.org/W2611384543","https://openalex.org/W2744067478","https://openalex.org/W2758621295","https://openalex.org/W2769863461","https://openalex.org/W2789248965","https://openalex.org/W2790060412","https://openalex.org/W2791440917","https://openalex.org/W2800076889","https://openalex.org/W2886418951","https://openalex.org/W2921046765","https://openalex.org/W2921886179","https://openalex.org/W2921933403","https://openalex.org/W2921945517","https://openalex.org/W2966202279","https://openalex.org/W2984477551","https://openalex.org/W2990700108","https://openalex.org/W3000264207","https://openalex.org/W3004354595","https://openalex.org/W3142120744"],"related_works":["https://openalex.org/W2288286056","https://openalex.org/W2130012952","https://openalex.org/W2136547340","https://openalex.org/W2106406109","https://openalex.org/W2532945253","https://openalex.org/W2143702700","https://openalex.org/W3081098926","https://openalex.org/W3083429320","https://openalex.org/W2913626508","https://openalex.org/W2066100939"],"abstract_inverted_index":{"The":[0],"substantial":[1],"increase":[2],"in":[3,57,104,176],"mobile":[4],"data-rates,":[5],"enabled":[6],"by":[7,190],"the":[8,18,43,66,78,98,129,134,171,186,191,196,200],"5G":[9],"standard,":[10],"calls":[11],"for":[12,31],"significantly":[13],"lower":[14],"integrated":[15],"jitter":[16,113,188],"of":[17,80,106,136,185,199],"local":[19],"oscillator":[20],"with":[21,26],"respect":[22],"to":[23,77,97,115,127,170],"previous":[24],"generations,":[25],"requirements":[27],"below":[28],"90fs":[29],"rms":[30],"millimeter-wave":[32],"frequency":[33,108],"bands":[34],"[1].":[35,211],"To":[36,117,142],"satisfy":[37],"such":[38],"stringent":[39],"requirements,":[40],"while":[41],"at":[42,133],"same":[44],"time":[45],"guaranteeing":[46],"fast":[47],"lock,":[48],"analog":[49,81],"PLLs":[50],"have":[51],"been":[52],"preferred":[53],"over":[54],"digital":[55,150],"implementations":[56],"recent":[58],"literature":[59],"[1],":[60],"[2].":[61],"Digital":[62,84],"bang-bang":[63,85,99],"PLLs,":[64,86],"on":[65,122,144,153],"other":[67],"hand,":[68],"consume":[69],"less":[70],"power":[71],"and":[72,110,140,165,195,208],"occupy":[73],"smaller":[74],"footprint":[75],"due":[76,96,114],"absence":[79],"loop":[82],"filters.":[83],"however,":[87],"generally":[88],"suffer":[89],"from":[90,111,205],"poor":[91],"locking":[92,160],"performance,":[93],"which":[94],"is":[95],"phase":[100],"detector":[101],"(BBPD)":[102],"overloading":[103],"presence":[105],"large":[107],"errors,":[109],"increased":[112],"quantization.":[116],"improve":[118,143],"locking,":[119],"[3]":[120],"relies":[121],"additional":[123,137],"frequency-locking":[124],"loops":[125],"(FLLs)":[126],"bypass":[128],"BBPD":[130],"when":[131],"overloaded,":[132],"cost":[135],"design":[138],"complexity":[139],"power.":[141],"quantization":[145,202],"noise,":[146],"[4]":[147],"proposes":[148],"a":[149,177],"PLL":[151,179],"based":[152],"an":[154,181],"enhanced-resolution":[155],"time-to-digital":[156],"converter":[157,193],"(TDC).":[158],"However,":[159],"performances":[161],"were":[162],"not":[163],"addressed,":[164],"its":[166,206],"operation":[167],"was":[168],"limited":[169],"integer-N":[172],"mode.":[173],"Achieving":[174],"low-jitter":[175],"fractional-N":[178],"poses":[180],"extra":[182],"challenge,":[183],"because":[184],"random":[187],"introduced":[189],"digital-to-time":[192],"(DTC)":[194],"spectrum":[197],"folding":[198],"DTC":[201],"noise":[203],"arising":[204],"non-linearity":[207],"memory":[209],"effects":[210]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":13}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2020-09-11T00:00:00"}