{"id":"https://openalex.org/W2790961995","doi":"https://doi.org/10.1109/isscc.2018.8310348","title":"A 4-to-16GHz inverter-based injection-locked quadrature clock generator with phase interpolators for multi-standard I/Os in 7nm FinFET","display_name":"A 4-to-16GHz inverter-based injection-locked quadrature clock generator with phase interpolators for multi-standard I/Os in 7nm FinFET","publication_year":2018,"publication_date":"2018-02-01","ids":{"openalex":"https://openalex.org/W2790961995","doi":"https://doi.org/10.1109/isscc.2018.8310348","mag":"2790961995"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2018.8310348","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2018.8310348","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111644958","display_name":"Stanley Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Stanley Chen","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039163297","display_name":"Lei Zhou","orcid":"https://orcid.org/0000-0001-7272-9093"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lei Zhou","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071471659","display_name":"Zhuang Ian","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ian Zhuang","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101871861","display_name":"Jay Im","orcid":"https://orcid.org/0000-0003-3996-6171"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jay Im","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027813545","display_name":"Didem Turker Melek","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Didem Melek","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067492112","display_name":"Jinyung Namkoong","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jinyung Namkoong","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028789441","display_name":"Mayank Raj","orcid":"https://orcid.org/0000-0002-2522-8816"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mayank Raj","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102160060","display_name":"Jaewook Shin","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jaewook Shin","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032626468","display_name":"Yohan Frans","orcid":"https://orcid.org/0000-0002-4336-9751"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yohan Frans","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103565965","display_name":"Ken Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ken Chang","raw_affiliation_strings":["Xilinx, San Jose, CA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5111644958"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":2.1888,"has_fulltext":false,"cited_by_count":62,"citation_normalized_percentile":{"value":0.88136094,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"390","last_page":"392"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.7146309614181519},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.6803439855575562},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6488964557647705},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.6228227615356445},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5596334338188171},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5282807946205139},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4285087287425995},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.42629456520080566},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3432146906852722},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28308022022247314},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.16011744737625122},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13292565941810608},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09950321912765503}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.7146309614181519},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.6803439855575562},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6488964557647705},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.6228227615356445},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5596334338188171},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5282807946205139},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4285087287425995},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.42629456520080566},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3432146906852722},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28308022022247314},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.16011744737625122},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13292565941810608},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09950321912765503}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2018.8310348","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2018.8310348","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Solid - State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/14","display_name":"Life below water","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2057532062","https://openalex.org/W2093875124","https://openalex.org/W2115791119","https://openalex.org/W2525567849","https://openalex.org/W2624563526","https://openalex.org/W2788595513","https://openalex.org/W6677121070","https://openalex.org/W6727480475"],"related_works":["https://openalex.org/W98453623","https://openalex.org/W2340624421","https://openalex.org/W2369998856","https://openalex.org/W2121982427","https://openalex.org/W1504430383","https://openalex.org/W2909296819","https://openalex.org/W1969806930","https://openalex.org/W2139891832","https://openalex.org/W2023668401","https://openalex.org/W2096016192"],"abstract_inverted_index":{"As":[0],"ever-increasing":[1],"bandwidth":[2],"demand":[3],"pushes":[4],"wireline":[5],"transceiver":[6],"data-rates":[7,21],"beyond":[8],"25Gb/s,":[9],"the":[10,53,58,95,103,115,129,133,141,170],"clocking":[11,98],"solution":[12],"for":[13],"multi-protocol":[14],"support":[15],"over":[16,140],"a":[17,23,38,120],"wide":[18],"range":[19],"of":[20,114,128,155],"becomes":[22],"key":[24],"design":[25],"challenge.":[26],"In":[27,69],"[1],":[28],"an":[29],"injection-locked":[30],"multi-phase":[31],"clock":[32,106],"generator":[33],"demonstrated":[34],"wideband":[35],"operation":[36],"and":[37,62,85,138,143,163],"high-resolution":[39],"phase":[40],"rotator":[41],"using":[42],"CML":[43,54,77,121],"in":[44,49,183],"28nm":[45],"FDSOI":[46],"CMOS.":[47],"However,":[48],"7nm":[50,184],"FinFET":[51],"technology,":[52],"implementation":[55,78],"suffers":[56],"from":[57,149],"reduced":[59],"supply":[60],"level":[61,177],"output":[63],"impedance":[64],"degradation":[65],"at":[66],"high":[67],"temperatures.":[68],"order":[70],"to":[71,81,119,135],"scale":[72],"power":[73],"consumption":[74],"with":[75,159],"data-rate,":[76],"also":[79],"needs":[80],"employ":[82],"bias":[83],"current":[84],"load":[86],"programmability,":[87],"further":[88],"impacting":[89],"its":[90,150],"performance.":[91],"For":[92],"these":[93],"reasons,":[94],"supply-regulated":[96],"inverter-based":[97,105],"scheme":[99],"is":[100],"proposed.":[101],"Furthermore,":[102],"full":[104],"chain":[107],"generates":[108],"smaller":[109],"random":[110],"jitter":[111],"(RJ)":[112],"because":[113],"faster":[116],"edge-rate":[117,139],"compared":[118],"implementation.":[122],"Supply":[123],"regulation,":[124],"applied":[125],"as":[126],"part":[127],"calibration":[130],"loop,":[131],"mitigates":[132],"sensitivity":[134],"inverter":[136],"delay":[137],"process":[142],"temperature":[144],"variations.":[145],"This":[146],"design,":[147],"benefiting":[148],"mostly-digital":[151],"structure,":[152],"adopts":[153],"\u201csea":[154],"gates\u201d":[156],"layout":[157],"style":[158],"optimized":[160],"via":[161],"patterns":[162],"uniform":[164],"metal":[165],"tracks,":[166],"which":[167],"effectively":[168],"alleviate":[169],"significant":[171],"parasitic":[172],"resistance":[173],"variations":[174],"on":[175],"low":[176],"metals":[178],"fabricated":[179],"by":[180],"multiple":[181],"patterning":[182],"FinFET.":[185]},"counts_by_year":[{"year":2025,"cited_by_count":20},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":3}],"updated_date":"2026-01-11T23:08:45.486102","created_date":"2025-10-10T00:00:00"}
