{"id":"https://openalex.org/W2593432307","doi":"https://doi.org/10.1109/isscc.2017.7870451","title":"26.4 A 0.4-to-1V 1MHz-to-2GHz switched-capacitor adiabatic clock driver achieving 55.6% clock power reduction","display_name":"26.4 A 0.4-to-1V 1MHz-to-2GHz switched-capacitor adiabatic clock driver achieving 55.6% clock power reduction","publication_year":2017,"publication_date":"2017-02-01","ids":{"openalex":"https://openalex.org/W2593432307","doi":"https://doi.org/10.1109/isscc.2017.7870451","mag":"2593432307"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2017.7870451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2017.7870451","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011014480","display_name":"Loai G. Salem","orcid":"https://orcid.org/0000-0002-5652-5098"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Loai G. Salem","raw_affiliation_strings":["University of California, San Diego, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, San Diego, CA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044161396","display_name":"Patrick P. Mercier","orcid":"https://orcid.org/0000-0003-1488-5076"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Patrick P. Mercier","raw_affiliation_strings":["University of California, San Diego, CA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, San Diego, CA","institution_ids":["https://openalex.org/I36258959"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.0233,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.77684974,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"442","last_page":"443"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6272798776626587},{"id":"https://openalex.org/keywords/reactance","display_name":"Reactance","score":0.6009325385093689},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5596029162406921},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5373604893684387},{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.5327358841896057},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5012288093566895},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.4983212947845459},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4847961962223053},{"id":"https://openalex.org/keywords/clock-network","display_name":"Clock network","score":0.4735890030860901},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47165051102638245},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.44007444381713867},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.4191927909851074},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.332017183303833},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2962300181388855},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.27132466435432434},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.26599907875061035},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.24444860219955444},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2118968963623047}],"concepts":[{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6272798776626587},{"id":"https://openalex.org/C176661527","wikidata":"https://www.wikidata.org/wiki/Q746935","display_name":"Reactance","level":3,"score":0.6009325385093689},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5596029162406921},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5373604893684387},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.5327358841896057},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5012288093566895},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.4983212947845459},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4847961962223053},{"id":"https://openalex.org/C2778182565","wikidata":"https://www.wikidata.org/wiki/Q1752879","display_name":"Clock network","level":5,"score":0.4735890030860901},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47165051102638245},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.44007444381713867},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.4191927909851074},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.332017183303833},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2962300181388855},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.27132466435432434},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.26599907875061035},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.24444860219955444},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2118968963623047},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2017.7870451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2017.7870451","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Solid-State Circuits Conference (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1505272351","https://openalex.org/W2013825797","https://openalex.org/W2073080323","https://openalex.org/W6630124008"],"related_works":["https://openalex.org/W2050988079","https://openalex.org/W2617502113","https://openalex.org/W3146405994","https://openalex.org/W1978275142","https://openalex.org/W1508592555","https://openalex.org/W2474747038","https://openalex.org/W2610873304","https://openalex.org/W1513897901","https://openalex.org/W2031867410","https://openalex.org/W2565835957"],"abstract_inverted_index":{"Clock":[0],"distribution":[1,16,115],"in":[2,59,127],"modern":[3,75,202],"SoCs":[4],"consumes":[5],"a":[6,37,109,212,229],"significant":[7],"fraction":[8],"of":[9,32,135,201],"total":[10],"chip":[11,70],"power.":[12],"To":[13,205],"reduce":[14],"clock":[15,34,81,90,114,222],"power,":[17],"resonant":[18,129],"clocking":[19,130,216],"schemes,":[20],"where":[21],"an":[22],"inductive":[23],"reactance":[24,31],"is":[25,108],"used":[26],"to":[27,61,64,100,111,152,160,163,226],"cancel":[28],"the":[29,66,88,93,101,161,197],"capacitive":[30],"global":[33,136],"networks":[35],"at":[36,55],"given":[38],"resonance":[39,167],"frequency,":[40],"f":[41,170],"<sub":[42,97,171],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[43,98,172],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">o</sub>":[44,173],",":[45],"have":[46],"been":[47],"proposed.":[48],"Conventionally,":[49],"such":[50,143],"schemes":[51,116],"are":[52,150],"only":[53],"suitable":[54],"high":[56],"multi-GHz":[57],"frequencies":[58,82,91],"order":[60],"be":[62],"able":[63],"place":[65],"employed":[67],"inductors":[68,148],"on":[69],"[1,":[71],"2].":[72],"Since":[73],"many":[74],"energy-efficient":[76],"SoC":[77],"designs":[78],"optimize":[79],"for":[80,182],"<;2GHz,":[83],"with":[84],"DVFS":[85],"techniques":[86,144],"bringing":[87],"core":[89],"and":[92,103,149,155,193],"supply":[94],"voltages":[95],"V":[96],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DD</sub>":[99],"MHz":[102],"near-threshold":[104],"regimes,":[105],"respectively,":[106,158],"there":[107],"need":[110,162],"develop":[112],"low-power":[113],"that":[117,218],"can":[118],"work":[119,126],"across":[120],"increasingly":[121],"wider":[122],"operating":[123],"ranges.":[124],"Recent":[125],"quasi-continuous":[128],"has":[131,178],"proposed":[132],"intermittent":[133],"cancelation":[134],"clock-tree":[137],"capacitance":[138],"during":[139],"edge":[140],"transitions,":[141],"however,":[142],"require":[145,187],"large":[146,188],"off-chip":[147,191],"limited":[151],"0.98MHz":[153],"[3]":[154],"150MHz":[156],"[4],":[157],"owing":[159],"operate":[164],"well":[165],"below":[166],"(i.e.,":[168],"<;":[169],"/10).":[174],"Thus,":[175],"while":[176],"prior-art":[177],"shown":[179],"power":[180,237],"reduction":[181],"targeted":[183],"applications,":[184],"they":[185],"all":[186],"on-":[189],"or":[190],"magnetics,":[192],"do":[194],"not":[195],"meet":[196],"MHz-to-GHz":[198],"frequency-range":[199],"needs":[200],"DVFS-enabled":[203],"SoCs.":[204],"address":[206],"these":[207],"problems,":[208],"this":[209],"paper":[210],"introduces":[211],"fully":[213],"integrated":[214],"adiabatic":[215],"scheme":[217],"efficiently":[219],"synthesizes":[220],"n-step":[221],"waveforms":[223],"from":[224],"1MHz":[225],"2GHz":[227],"via":[228],"switched-capacitor":[230],"DC-AC":[231],"multi-level":[232],"inverter":[233],"topology,":[234],"theoretically":[235],"reducing":[236],"by":[238],"1/n":[239],"without":[240],"using":[241],"any":[242],"magnetic":[243],"component.":[244]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
