{"id":"https://openalex.org/W2013825797","doi":"https://doi.org/10.1109/isscc.2013.6487804","title":"Intermittent resonant clocking enabling power reduction at any clock frequency for 0.37V 980kHz near-threshold logic circuits","display_name":"Intermittent resonant clocking enabling power reduction at any clock frequency for 0.37V 980kHz near-threshold logic circuits","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W2013825797","doi":"https://doi.org/10.1109/isscc.2013.6487804","mag":"2013825797"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2013.6487804","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2013.6487804","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004321250","display_name":"Hiroshi Fuketa","orcid":"https://orcid.org/0000-0003-0171-6679"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"H. Fuketa","raw_affiliation_strings":["University of Tokyo, Tokyo, Japan","Univ. of Tokyo, Tokyo (Japan)"],"affiliations":[{"raw_affiliation_string":"University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]},{"raw_affiliation_string":"Univ. of Tokyo, Tokyo (Japan)","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005079654","display_name":"Masahiro Nomura","orcid":"https://orcid.org/0000-0003-3706-4836"},"institutions":[{"id":"https://openalex.org/I4210125918","display_name":"Semiconductor Energy Laboratory (Japan)","ror":"https://ror.org/02vszc135","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210125918"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Nomura","raw_affiliation_strings":["Semiconductor Technology Academic Research Center, Yokohama, Japan","Semicond. Technol. Acad. Res. Center, Yokohama, Japan"],"affiliations":[{"raw_affiliation_string":"Semiconductor Technology Academic Research Center, Yokohama, Japan","institution_ids":["https://openalex.org/I4210125918"]},{"raw_affiliation_string":"Semicond. Technol. Acad. Res. Center, Yokohama, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003282110","display_name":"Makoto Takamiya","orcid":"https://orcid.org/0000-0003-0289-7790"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Takamiya","raw_affiliation_strings":["University of Tokyo, Tokyo, Japan","Univ. of Tokyo, Tokyo (Japan)"],"affiliations":[{"raw_affiliation_string":"University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]},{"raw_affiliation_string":"Univ. of Tokyo, Tokyo (Japan)","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049800551","display_name":"T. Sakurai","orcid":"https://orcid.org/0000-0001-5730-1937"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Sakurai","raw_affiliation_strings":["University of Tokyo, Tokyo, Japan","Univ. of Tokyo, Tokyo (Japan)"],"affiliations":[{"raw_affiliation_string":"University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]},{"raw_affiliation_string":"Univ. of Tokyo, Tokyo (Japan)","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5004321250"],"corresponding_institution_ids":["https://openalex.org/I74801974"],"apc_list":null,"apc_paid":null,"fwci":1.6793,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.85445578,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"436","last_page":"437"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5661386847496033},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.5406662225723267},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4659467935562134},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4529404640197754},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4439048171043396},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.43601784110069275},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4152887761592865},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.344099223613739},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32566046714782715},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.31047630310058594},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2990654408931732},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1954496204853058},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17606788873672485},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.08632892370223999}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5661386847496033},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.5406662225723267},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4659467935562134},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4529404640197754},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4439048171043396},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43601784110069275},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4152887761592865},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.344099223613739},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32566046714782715},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31047630310058594},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2990654408931732},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1954496204853058},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17606788873672485},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.08632892370223999},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isscc.2013.6487804","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2013.6487804","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.668.7565","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.668.7565","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://icdesign.iis.u-tokyo.ac.jp/201302_Fuketa_intermittent.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9300000071525574}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1995027759","https://openalex.org/W2101371360","https://openalex.org/W2127190809","https://openalex.org/W2140821582","https://openalex.org/W2153243960","https://openalex.org/W2159243841","https://openalex.org/W2168016639","https://openalex.org/W2170331607","https://openalex.org/W3150848079"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2347585086","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W1527953837","https://openalex.org/W4386230336","https://openalex.org/W2042100038","https://openalex.org/W4306968100","https://openalex.org/W2170979950","https://openalex.org/W1900707063"],"abstract_inverted_index":{"In":[0,62],"order":[1],"to":[2,30,81],"improve":[3],"the":[4,54,58],"energy":[5,26,48],"efficiency":[6],"of":[7,57],"logic":[8,89],"circuits,":[9],"reductions":[10],"in":[11,91],"capacitance":[12,56],"(C)":[13],"and":[14,79],"power":[15,71],"supply":[16],"voltage":[17],"(V":[18,40],"<sub":[19,32,35,41,86],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[20,33,36,42,87],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DD</sub>":[21,34],")":[22,44],"are":[23],"required,":[24],"as":[25],"consumption":[27],"is":[28,77],"proportional":[29],"CV":[31],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sub>":[37],".":[38],"Near-threshold":[39],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">t</sub>":[43,88],"operation":[45],"achieves":[46],"an":[47],"minimum.":[49],"Resonant":[50],"clocking":[51,68],"can":[52],"reduce":[53],"effective":[55],"clock":[59,75],"distribution":[60],"network.":[61],"this":[63],"work,":[64],"a":[65,82],"new":[66],"resonant":[67],"scheme":[69],"enabling":[70],"reduction":[72],"at":[73],"any":[74],"frequency":[76],"proposed":[78],"applied":[80],"0.37V":[83],"980kHz":[84],"near-V":[85],"circuit":[90],"40nm":[92],"CMOS.":[93]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":6}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}