{"id":"https://openalex.org/W2092823305","doi":"https://doi.org/10.1109/isscc.2013.6487788","title":"A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS","display_name":"A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W2092823305","doi":"https://doi.org/10.1109/isscc.2013.6487788","mag":"2092823305"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2013.6487788","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2013.6487788","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053540874","display_name":"Mozhgan Mansuri","orcid":"https://orcid.org/0000-0002-0277-7775"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. Mansuri","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090419770","display_name":"James Jaussi","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. E. Jaussi","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035029367","display_name":"Joseph Kennedy","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. T. Kennedy","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062381369","display_name":"Tzu-Chien Hsueh","orcid":"https://orcid.org/0000-0002-8596-6976"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Hsueh","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048584348","display_name":"Sudip Shekhar","orcid":"https://orcid.org/0000-0003-0383-1929"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Shekhar","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023328166","display_name":"Ganesh Balamurugan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Balamurugan","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010946517","display_name":"Frank O\u2019Mahony","orcid":"https://orcid.org/0000-0001-7961-9452"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"F. O'Mahony","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010693797","display_name":"Clark Roberts","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Roberts","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049783709","display_name":"Randy Mooney","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Mooney","raw_affiliation_strings":["Intel, Mapleton, UT, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Mapleton, UT, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089280659","display_name":"Bryan Casper","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Casper","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","[Intel, Hillsboro, OR, USA]"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5053540874"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":5.4383,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.96126066,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"402","last_page":"403"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6761696338653564},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6132150292396545},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5940856337547302},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.551771879196167},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36245912313461304},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33724361658096313},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.23161542415618896},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13612526655197144},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0972619354724884}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6761696338653564},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6132150292396545},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5940856337547302},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.551771879196167},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36245912313461304},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33724361658096313},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.23161542415618896},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13612526655197144},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0972619354724884}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2013.6487788","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2013.6487788","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1986315961","https://openalex.org/W1995082704","https://openalex.org/W2079668820","https://openalex.org/W2115278151","https://openalex.org/W2135196523","https://openalex.org/W2145598637","https://openalex.org/W2157486149","https://openalex.org/W2164188348","https://openalex.org/W3149917762"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W2389214306","https://openalex.org/W4306968100","https://openalex.org/W2965083567","https://openalex.org/W4235240664","https://openalex.org/W1838576100","https://openalex.org/W2757182831","https://openalex.org/W2109445684"],"abstract_inverted_index":{"High-performance":[0],"computing":[1],"(HPC)":[2],"systems":[3],"demand":[4],"aggressive":[5,144],"scaling":[6,147],"of":[7,15,70,105,113],"memory":[8],"and":[9,21,54,63,125,138],"I/O":[10,18,45],"to":[11,25,52,66,99,107,115,149],"achieve":[12],"multiple":[13],"terabits/sec":[14],"bandwidth.":[16,34],"Minimizing":[17],"cost,":[19],"area":[20],"power":[22,56,90,103,118,140],"are":[23],"crucial":[24],"achieving":[26],"a":[27,41,60],"practically":[28],"realizable":[29],"system":[30,46],"with":[31,47,101,143],"such":[32,121],"large":[33],"To":[35,87],"meet":[36],"these":[37],"needs,":[38],"we":[39],"developed":[40,59],"low-power":[42],"dense":[43],"64-lane":[44],"per-port":[48],"aggregate":[49,111],"bandwidth":[50,112,137],"up":[51],"1Tb/s":[53],"2.6pJ/bit":[55],"efficiency.":[57],"We":[58],"high-density":[61],"connector":[62],"cable,":[64],"attached":[65],"the":[67,71,92,135],"top":[68],"side":[69],"package":[72],"that":[73],"enables":[74],"this":[75],"high":[76],"interconnect":[77],"density.":[78],"A":[79],"lane-failover":[80],"mechanism":[81],"provides":[82],"design":[83],"robustness":[84],"for":[85],"fault-tolerance.":[86],"further":[88],"optimize":[89],"efficiency,":[91],"lane":[93],"data":[94],"rate":[95],"scales":[96],"from":[97],"2":[98],"16Gb/s":[100],"non-linear":[102],"efficiency":[104,141],"0.8":[106],"2.6pJ/bit,":[108],"providing":[109],"scalable":[110,119],"0.128":[114],"1Tb/s.":[116],"Highly":[117],"circuits":[120],"as":[122],"CMOS":[123],"clocking":[124],"reconfigurable":[126],"current-mode":[127],"(CM)":[128],"or":[129],"voltage-mode":[130],"(VM)":[131],"TX":[132],"driver":[133],"enable":[134],"8\u00d7":[136],"3\u00d7":[139],"scalability":[142],"supply":[145],"voltage":[146],"(0.6":[148],"1.08V).":[150]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":11},{"year":2013,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
