{"id":"https://openalex.org/W1967823490","doi":"https://doi.org/10.1109/isscc.2013.6487720","title":"A 0.022mm&lt;sup&gt;2&lt;/sup&gt; 970&amp;#x00B5;W dual-loop injection-locked PLL with &amp;#x2212;243dB FOM using synthesizable all-digital PVT calibration circuits","display_name":"A 0.022mm&lt;sup&gt;2&lt;/sup&gt; 970&amp;#x00B5;W dual-loop injection-locked PLL with &amp;#x2212;243dB FOM using synthesizable all-digital PVT calibration circuits","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W1967823490","doi":"https://doi.org/10.1109/isscc.2013.6487720","mag":"1967823490"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2013.6487720","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2013.6487720","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074494245","display_name":"Wei Deng","orcid":"https://orcid.org/0000-0002-6323-4539"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Wei Deng","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan","[Tokyo Institute of Technology, Tokyo, JAPAN]"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"[Tokyo Institute of Technology, Tokyo, JAPAN]","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039830680","display_name":"Ahmed Musa","orcid":"https://orcid.org/0000-0001-6364-1719"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"A. Musa","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan","[Tokyo Institute of Technology, Tokyo, JAPAN]"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"[Tokyo Institute of Technology, Tokyo, JAPAN]","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050565374","display_name":"Teerachot Siriburanon","orcid":"https://orcid.org/0000-0003-1658-9596"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Siriburanon","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan","[Tokyo Institute of Technology, Tokyo, JAPAN]"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"[Tokyo Institute of Technology, Tokyo, JAPAN]","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043657126","display_name":"Masaya Miyahara","orcid":"https://orcid.org/0000-0002-5748-5921"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Miyahara","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan","[Tokyo Institute of Technology, Tokyo, JAPAN]"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"[Tokyo Institute of Technology, Tokyo, JAPAN]","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064086312","display_name":"Kenichi Okada","orcid":"https://orcid.org/0000-0002-1082-7672"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Okada","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan","[Tokyo Institute of Technology, Tokyo, JAPAN]"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"[Tokyo Institute of Technology, Tokyo, JAPAN]","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111453629","display_name":"Akira Matsuzawa","orcid":null},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"A. Matsuzawa","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan","[Tokyo Institute of Technology, Tokyo, JAPAN]"],"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]},{"raw_affiliation_string":"[Tokyo Institute of Technology, Tokyo, JAPAN]","institution_ids":["https://openalex.org/I114531698"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5074494245"],"corresponding_institution_ids":["https://openalex.org/I114531698"],"apc_list":null,"apc_paid":null,"fwci":5.2884,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.95791843,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"248","last_page":"249"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.8958216309547424},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8534548282623291},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8297206163406372},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5434636473655701},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.49167829751968384},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.47701191902160645},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.4456857442855835},{"id":"https://openalex.org/keywords/frequency-drift","display_name":"Frequency drift","score":0.42437052726745605},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39851686358451843},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3634979724884033},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3558090031147003},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33295804262161255},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24779292941093445},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1498190462589264}],"concepts":[{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.8958216309547424},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8534548282623291},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8297206163406372},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5434636473655701},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.49167829751968384},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.47701191902160645},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.4456857442855835},{"id":"https://openalex.org/C122348159","wikidata":"https://www.wikidata.org/wiki/Q5502869","display_name":"Frequency drift","level":4,"score":0.42437052726745605},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39851686358451843},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3634979724884033},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3558090031147003},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33295804262161255},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24779292941093445},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1498190462589264},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2013.6487720","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2013.6487720","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320308341","display_name":"Canon Foundation in Europe","ror":"https://ror.org/03sjs8573"},{"id":"https://openalex.org/F4320320912","display_name":"Ministry of Education, Culture, Sports, Science and Technology","ror":"https://ror.org/048rj2z13"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2049653766","https://openalex.org/W2053503063","https://openalex.org/W2161139924","https://openalex.org/W2161581992","https://openalex.org/W2167891824"],"related_works":["https://openalex.org/W2089131288","https://openalex.org/W1600405202","https://openalex.org/W1486070987","https://openalex.org/W3064661991","https://openalex.org/W2301158783","https://openalex.org/W2133120878","https://openalex.org/W2354050524","https://openalex.org/W2976219355","https://openalex.org/W40973090","https://openalex.org/W2315636541"],"abstract_inverted_index":{"For":[0],"modern":[1],"SoC":[2],"systems,":[3],"stringent":[4],"requirements":[5],"on":[6],"on-chip":[7],"clock":[8,46],"generators":[9],"include":[10],"low":[11,13],"area,":[12],"power":[14],"consumption,":[15],"environmental":[16],"insensitivity,":[17],"and":[18,33,56,113,153,190],"the":[19,40,75,89,99,106,130,171,180],"lowest":[20],"possible":[21],"jitter":[22,42],"performance.":[23],"Multiplying":[24],"Delay-Locked":[25],"Loop":[26],"(MDLL)":[27],"[1-2],":[28],"subharmonically":[29],"injection-locked":[30,79,93],"techniques":[31,35],"[3],":[32],"sub-sampling":[34],"[4-5]":[36],"can":[37,175],"significantly":[38],"improve":[39],"random":[41],"characteristics":[43],"of":[44,77,91,132],"a":[45,82,103,123,133,143,148,167],"generator.":[47],"However,":[48,88],"in":[49,105],"order":[50],"to":[51],"guarantee":[52],"their":[53],"correct":[54],"operation":[55],"optimal":[57],"performance":[58],"over":[59,188],"process-voltage-temperature":[60],"(PVT)":[61],"variations,":[62],"each":[63],"method":[64,184],"requires":[65],"additional":[66],"calibration":[67,85],"circuits,":[68],"which":[69],"impose":[70],"difficult-to-meet":[71],"timing":[72],"constraints.":[73],"In":[74],"case":[76],"an":[78,92],"PLL":[80],"(IL-PLL),":[81],"free-running":[83,107,138,172],"frequency":[84,108,173],"is":[86,95,162],"required.":[87],"output":[90,187],"oscillator":[94,140],"always":[96],"fixed":[97],"at":[98],"desired":[100],"frequency,":[101],"so":[102],"shift":[104,174],"(e.g.":[109],"caused":[110],"by":[111,121,179],"temperature":[112,152,189],"voltage":[114,154,191],"variations)":[115],"cannot":[116],"be":[117,176],"simply":[118],"compensated":[119,177],"for":[120,150,165,178],"using":[122],"frequency-locked":[124],"loop":[125],"(FLL).":[126],"Therefore,":[127],"we":[128],"propose":[129],"use":[131],"dual-loop":[134],"topology":[135],"with":[136],"one":[137],"voltage-controlled":[139],"(VCO)":[141],"as":[142],"replica":[144,181],"VCO":[145,158],"placed":[146],"inside":[147],"FLL":[149],"tracking":[151],"drift.":[155],"The":[156,183],"other":[157],"(the":[159],"main":[160],"VCO)":[161],"injection":[163],"locked":[164],"producing":[166],"low-jitter":[168],"clock,":[169],"while":[170],"loop.":[182],"provides":[185],"robust":[186],"variations.":[192]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
