{"id":"https://openalex.org/W2032942076","doi":"https://doi.org/10.1109/isscc.2010.5433914","title":"A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications","display_name":"A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications","publication_year":2010,"publication_date":"2010-02-01","ids":{"openalex":"https://openalex.org/W2032942076","doi":"https://doi.org/10.1109/isscc.2010.5433914","mag":"2032942076"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2010.5433914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433914","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023225287","display_name":"Meng\u2010Fan Chang","orcid":"https://orcid.org/0000-0001-6905-6350"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Meng-Fan Chang","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022395406","display_name":"Shu-Meng Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shu-Meng Yang","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103496306","display_name":"Chih-Wei Liang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Wei Liang","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072415400","display_name":"Chih-Chyuang Chiang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Chyuang Chiang","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023301745","display_name":"Pi-Feng Chiu","orcid":"https://orcid.org/0000-0001-6665-3555"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Pi-Feng Chiu","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111708176","display_name":"Ku-Feng Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ku-Feng Lin","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, Taiwan","National Tsing Hua University, , Hsinchu, Taiw\u00e1n"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"National Tsing Hua University, , Hsinchu, Taiw\u00e1n","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102137048","display_name":"Yuan\u2010Hua Chu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yuan-Hua Chu","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103508169","display_name":"Wen-Chin Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wen-Chin Wu","raw_affiliation_strings":["Industrial Technology Research Institute, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Industrial Technology Research Institute, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210148468"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043110110","display_name":"H. Yamauchi","orcid":"https://orcid.org/0000-0003-4033-8893"},"institutions":[{"id":"https://openalex.org/I100722782","display_name":"Fukuoka Institute of Technology","ror":"https://ror.org/00bmxak18","country_code":"JP","type":"education","lineage":["https://openalex.org/I100722782"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Yamauchi","raw_affiliation_strings":["Fukuoka Institute of Technology, Fukuoka, Japan","Fukuoka Institute of Technology (Japan)"],"affiliations":[{"raw_affiliation_string":"Fukuoka Institute of Technology, Fukuoka, Japan","institution_ids":["https://openalex.org/I100722782"]},{"raw_affiliation_string":"Fukuoka Institute of Technology (Japan)","institution_ids":["https://openalex.org/I100722782"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5023225287"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":3.7453,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.9361087,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"266","last_page":"267"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.7520297765731812},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.706514835357666},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5596247315406799},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5435339212417603},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.46546363830566406},{"id":"https://openalex.org/keywords/read-only-memory","display_name":"Read-only memory","score":0.42895323038101196},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4225321114063263},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4113498628139496},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.40843576192855835},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3420122563838959},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3119741678237915},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30646073818206787},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19057786464691162},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.17591601610183716},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.15855249762535095},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10015499591827393},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09101161360740662}],"concepts":[{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.7520297765731812},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.706514835357666},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5596247315406799},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5435339212417603},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.46546363830566406},{"id":"https://openalex.org/C89836824","wikidata":"https://www.wikidata.org/wiki/Q160710","display_name":"Read-only memory","level":2,"score":0.42895323038101196},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4225321114063263},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4113498628139496},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.40843576192855835},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3420122563838959},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3119741678237915},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30646073818206787},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19057786464691162},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17591601610183716},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.15855249762535095},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10015499591827393},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09101161360740662},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2010.5433914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433914","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1491082069","https://openalex.org/W1990746916","https://openalex.org/W2116456330","https://openalex.org/W2122497527","https://openalex.org/W2127190809","https://openalex.org/W2134075114","https://openalex.org/W2159359851","https://openalex.org/W2535388190","https://openalex.org/W2788753311","https://openalex.org/W6679062542","https://openalex.org/W6683266678"],"related_works":["https://openalex.org/W3165307257","https://openalex.org/W2031302924","https://openalex.org/W2515312339","https://openalex.org/W2145098804","https://openalex.org/W2046383573","https://openalex.org/W4226211266","https://openalex.org/W2991151827","https://openalex.org/W2130440338","https://openalex.org/W1574518580","https://openalex.org/W2791832526"],"abstract_inverted_index":{"A":[0],"90":[1],"nm":[2],"256":[3],"Kb":[4],"NAND-ROM":[5],"using":[6],"read-1":[7],"noise":[8],"elimination":[9],"and":[10,19,25,41,50],"read-0":[11],"sensing-margin-expanding":[12],"schemes":[13],"is":[14],"functional":[15],"at":[16,35],"0.29":[17],"V":[18,36,42],"3":[20],"MHz":[21],"with":[22],"100%":[23],"code-coverage":[24],"5%":[26],"area":[27],"overhead.":[28],"This":[29],"work":[30],"reduces":[31],"the":[32],"delay-per-BL-length,":[33],"energy-per-bit":[34],"<sub":[37,43],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[38,44],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DDmin</sub>":[39,45],",":[40],"-delay-product":[46],"by":[47],"3000\u00d7,":[48],"4\u00d7":[49],"3700\u00d7,":[51],"respectively,":[52],"compared":[53],"to":[54],"previous":[55],"low-voltage":[56],"ROMs.":[57]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
