{"id":"https://openalex.org/W2085651287","doi":"https://doi.org/10.1109/isscc.2010.5433903","title":"A 320mV-to-1.2V on-die fine-grained reconfigurable fabric for DSP/media accelerators in 32nm CMOS","display_name":"A 320mV-to-1.2V on-die fine-grained reconfigurable fabric for DSP/media accelerators in 32nm CMOS","publication_year":2010,"publication_date":"2010-02-01","ids":{"openalex":"https://openalex.org/W2085651287","doi":"https://doi.org/10.1109/isscc.2010.5433903","mag":"2085651287"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2010.5433903","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433903","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006348328","display_name":"Amit Agarwal","orcid":"https://orcid.org/0000-0002-4220-3346"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Agarwal","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039276616","display_name":"Sanu Mathew","orcid":"https://orcid.org/0000-0003-1344-7533"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanu K Mathew","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109275074","display_name":"Steven K. Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven K Hsu","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052106795","display_name":"Mark Anders","orcid":"https://orcid.org/0000-0001-5748-8420"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark A Anders","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081032347","display_name":"Himanshu Kaul","orcid":"https://orcid.org/0000-0003-1586-7486"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Himanshu Kaul","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088477949","display_name":"Farhana Sheikh","orcid":"https://orcid.org/0000-0001-5078-0816"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Farhana Sheikh","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081157353","display_name":"R. Ramanarayanan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajaraman Ramanarayanan","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078427610","display_name":"Suresh Srinivasan","orcid":"https://orcid.org/0000-0002-0228-8795"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suresh Srinivasan","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074107306","display_name":"Ram Krishnamurthy","orcid":"https://orcid.org/0000-0002-2428-7099"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ram Krishnamurthy","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112875487","display_name":"Shekhar Borkar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shekhar Borkar","raw_affiliation_strings":["Intel, Hillsboro, OR","[Intel, Hillsboro, OR, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"[Intel, Hillsboro, OR, USA]","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.1793,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.96627622,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"328","last_page":"329"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.7000409960746765},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.639173150062561},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.5952393412590027},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5597871541976929},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49342694878578186},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4875175654888153},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4583001732826233},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.412667453289032},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39828622341156006},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37168702483177185},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32970839738845825},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25718367099761963},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1790328025817871},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.10414323210716248}],"concepts":[{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.7000409960746765},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.639173150062561},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.5952393412590027},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5597871541976929},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49342694878578186},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4875175654888153},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4583001732826233},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.412667453289032},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39828622341156006},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37168702483177185},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32970839738845825},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25718367099761963},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1790328025817871},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.10414323210716248},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2010.5433903","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433903","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1491082069","https://openalex.org/W2096142955","https://openalex.org/W2121903189","https://openalex.org/W6678331420"],"related_works":["https://openalex.org/W2042399072","https://openalex.org/W3144620029","https://openalex.org/W2356166161","https://openalex.org/W2130533867","https://openalex.org/W2139082473","https://openalex.org/W2045163867","https://openalex.org/W2059502833","https://openalex.org/W2155131180","https://openalex.org/W2389800961","https://openalex.org/W1995389502"],"abstract_inverted_index":{"A":[0],"32":[1],"nm":[2],"on-die":[3],"fine-grained":[4],"reconfigurable":[5],"fabric":[6],"for":[7],"DSP/media":[8],"accelerators":[9],"is":[10,62],"fabricated":[11],"and":[12,38,51,69],"occupies":[13],"a":[14,43],"0.076":[15],"mm":[16],"<sup":[17],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[18],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[19],"die.":[20],"The":[21,58],"optimized":[22],"hybrid":[23],"arithmetic":[24],"configurable":[25],"logic":[26],"blocks":[27],"with":[28],"self-decoded":[29],"look-up":[30],"tables,":[31],"ultra-low":[32],"voltage":[33,56],"PVT-tolerant":[34],"register":[35],"file":[36],"circuits":[37],"dual-supply":[39],"operation":[40],"help":[41],"enable":[42],"2.4":[44],"GHz":[45],"nominal":[46],"performance":[47],"at":[48,66],"1.0":[49],"V":[50,54],"320":[52],"mV-to-1.2":[53],"dynamic":[55],"range.":[57],"peak":[59],"energy":[60],"efficiency":[61],"2.6TOPS/W":[63],"when":[64],"measured":[65],"340":[67],"mV":[68],"50\u00b0C.":[70]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}