{"id":"https://openalex.org/W2085809676","doi":"https://doi.org/10.1109/isscc.2010.5433849","title":"A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor","display_name":"A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor","publication_year":2010,"publication_date":"2010-02-01","ids":{"openalex":"https://openalex.org/W2085809676","doi":"https://doi.org/10.1109/isscc.2010.5433849","mag":"2085809676"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2010.5433849","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433849","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108463539","display_name":"Juergen Pille","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Juergen Pille","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113538128","display_name":"Dieter Wendel","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Dieter Wendel","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110822742","display_name":"Otto Wagner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Otto Wagner","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086017875","display_name":"R. Sautter","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rolf Sautter","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019002619","display_name":"Wolfgang Penth","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Wolfgang Penth","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041832037","display_name":"Thomas Froehnel","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thomas Froehnel","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102136203","display_name":"Stefan Buettner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Buettner","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080378528","display_name":"Otto Torreiter","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Otto Torreiter","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029961246","display_name":"Martin Eckert","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095996","display_name":"IBM (Germany)","ror":"https://ror.org/00pm7rm97","country_code":"DE","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210095996"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Martin Eckert","raw_affiliation_strings":["IBM, Boeblingen, Germany","IBM Boeblingen, Germany"],"affiliations":[{"raw_affiliation_string":"IBM, Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]},{"raw_affiliation_string":"IBM Boeblingen, Germany","institution_ids":["https://openalex.org/I4210095996"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029764380","display_name":"Jose Paredes","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jose Paredes","raw_affiliation_strings":["IBM, Austin, TX","IBM, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050457979","display_name":"David Hrusecky","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Hrusecky","raw_affiliation_strings":["IBM, Austin, TX","IBM, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044198492","display_name":"David Ray","orcid":"https://orcid.org/0000-0002-4739-6773"},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Ray","raw_affiliation_strings":["IBM, Austin, TX","IBM, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"IBM, Austin, TX","institution_ids":["https://openalex.org/I4210156936"]},{"raw_affiliation_string":"IBM, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088080334","display_name":"M. Canada","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Miles Canada","raw_affiliation_strings":["IBM, Burlington, VT","IBM, Burlington, Vt., USA"],"affiliations":[{"raw_affiliation_string":"IBM, Burlington, VT","institution_ids":["https://openalex.org/I1341412227"]},{"raw_affiliation_string":"IBM, Burlington, Vt., USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":13,"corresponding_author_ids":["https://openalex.org/A5108463539"],"corresponding_institution_ids":["https://openalex.org/I4210095996"],"apc_list":null,"apc_paid":null,"fwci":1.2484,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.81208442,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"344","last_page":"345"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7511805295944214},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7509334087371826},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7191948890686035},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6391751766204834},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5907909870147705},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5780786275863647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45882439613342285},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.4579677879810333},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.43910154700279236},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.41781190037727356},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3989937901496887},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.371685266494751},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2922993302345276},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20947235822677612},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.1443949043750763},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.14286121726036072},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12293988466262817}],"concepts":[{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7511805295944214},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7509334087371826},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7191948890686035},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6391751766204834},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5907909870147705},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5780786275863647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45882439613342285},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.4579677879810333},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.43910154700279236},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.41781190037727356},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3989937901496887},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.371685266494751},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2922993302345276},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20947235822677612},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.1443949043750763},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.14286121726036072},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12293988466262817},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2010.5433849","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433849","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W1536055436","https://openalex.org/W2175366782"],"related_works":["https://openalex.org/W2042526628","https://openalex.org/W2186949690","https://openalex.org/W2549803267","https://openalex.org/W2497617944","https://openalex.org/W3019064768","https://openalex.org/W2167303720","https://openalex.org/W1563139915","https://openalex.org/W3019683061","https://openalex.org/W2061075966","https://openalex.org/W3147501184"],"abstract_inverted_index":{"The":[0,33,49],"POWER7":[1],"<sup":[2],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[3],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">TM</sup>":[4],"microprocessor":[5],"features":[6],"a":[7,14,20,54],"32":[8],"kB":[9],"L1":[10],"data":[11],"cache":[12],"with":[13,30],"2R":[15],"and":[16,41],"banked-1W":[17],"functionality":[18],"using":[19],"6T-SRAM":[21],"cell.":[22],"Read/write":[23],"collision":[24],"is":[25,51],"intercepted":[26],"inside":[27],"the":[28,45],"array":[29],"write-over-read":[31],"priority.":[32],"array-specific":[34],"power":[35],"supply":[36],"improves":[37],"SRAM":[38],"cell":[39],"stability":[40],"performance":[42],"while":[43],"reducing":[44],"logic":[46],"voltage":[47],"level.":[48],"macro":[50],"fabricated":[52],"in":[53],"45nm":[55],"CMOS":[56],"SOI":[57],"technology.":[58]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}