{"id":"https://openalex.org/W2085732029","doi":"https://doi.org/10.1109/isscc.2010.5433841","title":"Spur-reduction techniques for PLLs using sub-sampling phase detection","display_name":"Spur-reduction techniques for PLLs using sub-sampling phase detection","publication_year":2010,"publication_date":"2010-02-01","ids":{"openalex":"https://openalex.org/W2085732029","doi":"https://doi.org/10.1109/isscc.2010.5433841","mag":"2085732029"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2010.5433841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433841","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://research.utwente.nl/en/publications/c7c14af9-3734-4eaa-8905-6855f7f219fc","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049999335","display_name":"Xiang Gao","orcid":"https://orcid.org/0000-0003-2890-061X"},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Xiang Gao","raw_affiliation_strings":["Universitv of Twente, Enschede, Netherlands","University of Twente Enschede Netherlands"],"affiliations":[{"raw_affiliation_string":"Universitv of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]},{"raw_affiliation_string":"University of Twente Enschede Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023038843","display_name":"Eric A.M. Klumperink","orcid":"https://orcid.org/0000-0003-2487-8996"},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Eric A. M. Klumperink","raw_affiliation_strings":["Universiteit Twente, Enschede, Overijssel, NL","University of Twente Enschede Netherlands"],"affiliations":[{"raw_affiliation_string":"Universiteit Twente, Enschede, Overijssel, NL","institution_ids":["https://openalex.org/I94624287"]},{"raw_affiliation_string":"University of Twente Enschede Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080523927","display_name":"Gerard Socci","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gerard Socci","raw_affiliation_strings":["National Semiconductor, Santa Clara, CA","Nat. Semicond., Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"National Semiconductor, Santa Clara, CA","institution_ids":[]},{"raw_affiliation_string":"Nat. Semicond., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061692135","display_name":"Mounir Bohsali","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mounir Bohsali","raw_affiliation_strings":["National Semiconductor, Santa Clara, CA","Nat. Semicond., Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"National Semiconductor, Santa Clara, CA","institution_ids":[]},{"raw_affiliation_string":"Nat. Semicond., Santa Clara, CA, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035402438","display_name":"Bram Nauta","orcid":"https://orcid.org/0000-0001-6790-5873"},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Bram Nauta","raw_affiliation_strings":["Universitv of Twente, Enschede, Netherlands","University of Twente Enschede Netherlands"],"affiliations":[{"raw_affiliation_string":"Universitv of Twente, Enschede, Netherlands","institution_ids":["https://openalex.org/I94624287"]},{"raw_affiliation_string":"University of Twente Enschede Netherlands","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5049999335"],"corresponding_institution_ids":["https://openalex.org/I94624287"],"apc_list":null,"apc_paid":null,"fwci":3.8233,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.93595419,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"474","last_page":"475"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.781292200088501},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.7766227722167969},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.7519519329071045},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.48790785670280457},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48450610041618347},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.440108984708786},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42455410957336426},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3869098126888275},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.32359758019447327},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26925185322761536},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18288329243659973},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.12734824419021606},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12405708432197571},{"id":"https://openalex.org/keywords/step-response","display_name":"Step response","score":0.11904987692832947},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.1081395149230957},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10385265946388245},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.06438189744949341},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.06413516402244568}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.781292200088501},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.7766227722167969},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.7519519329071045},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.48790785670280457},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48450610041618347},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.440108984708786},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42455410957336426},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3869098126888275},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.32359758019447327},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26925185322761536},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18288329243659973},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.12734824419021606},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12405708432197571},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.11904987692832947},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.1081395149230957},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10385265946388245},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.06438189744949341},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.06413516402244568}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/isscc.2010.5433841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2010.5433841","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","raw_type":"proceedings-article"},{"id":"pmh:oai:ris.utwente.nl:openaire_cris_publications/c7c14af9-3734-4eaa-8905-6855f7f219fc","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/c7c14af9-3734-4eaa-8905-6855f7f219fc","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Gao, X, Klumperink, E A M, Socci, G, Bohsali, M & Nauta, B 2010, Spur-reduction techniques for PLLs using sub-sampling phase detection. in Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2010 IEEE International. IEEE, Piscataway, pp. 474-475, IEEE International Solid-State Circuits Conference, ISSCC 2010, San Francisco, California, United States, 7/02/10. https://doi.org/10.1109/ISSCC.2010.5433841","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.979.5272","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.979.5272","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://doc.utwente.nl/72398/1/Gao%2C_X._IEEE_ISSCC_2010.pdf","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:ris.utwente.nl:openaire_cris_publications/c7c14af9-3734-4eaa-8905-6855f7f219fc","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/c7c14af9-3734-4eaa-8905-6855f7f219fc","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Gao, X, Klumperink, E A M, Socci, G, Bohsali, M & Nauta, B 2010, Spur-reduction techniques for PLLs using sub-sampling phase detection. in Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2010 IEEE International. IEEE, Piscataway, pp. 474-475, IEEE International Solid-State Circuits Conference, ISSCC 2010, San Francisco, California, United States, 7/02/10. https://doi.org/10.1109/ISSCC.2010.5433841","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2000068870","https://openalex.org/W2033908335","https://openalex.org/W2053503063","https://openalex.org/W2118269375","https://openalex.org/W2150524153","https://openalex.org/W2150912637"],"related_works":["https://openalex.org/W2070109416","https://openalex.org/W1523213765","https://openalex.org/W2388316590","https://openalex.org/W2976219355","https://openalex.org/W2089131288","https://openalex.org/W1600405202","https://openalex.org/W2217043549","https://openalex.org/W1486070987","https://openalex.org/W3064661991","https://openalex.org/W2124728021"],"abstract_inverted_index":{"In":[0],"PLL":[1,72],"designs,":[2],"a":[3,32,70,76],"wide":[4],"loop":[5,18,52],"bandwidth":[6,37],"is":[7,31,38],"often":[8],"desired":[9],"as":[10],"it":[11],"offers":[12],"fast":[13],"settling":[14],"time,":[15],"reduces":[16],"on-chip":[17],"filter":[19],"area":[20],"and":[21],"sensitivity":[22],"of":[23,69,89],"the":[24,36,43,51,66],"VCO":[25,44],"to":[26,64,73],"pulling.":[27],"The":[28],"reference":[29,67],"spur":[30,68],"major":[33],"issue":[34],"when":[35],"increased,":[39],"because":[40],"ripples":[41],"on":[42,60],"control":[45],"line":[46],"undergo":[47],"less":[48],"filtering":[49],"by":[50],"filter.":[53],"This":[54],"paper":[55],"proposes":[56],"design":[57],"techniques":[58],"based":[59],"sub-sampling":[61],"phase":[62],"detection":[63],"reduce":[65],"2.2GHz":[71],"\u221280dBc":[74],"at":[75],"high":[77],"loop-bandwidth-to-reference-frequency":[78],"ratio":[79],"(f":[80],"<inf":[81,85],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[82,86],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">BW</inf>":[83],"/f":[84],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">ref</inf>":[87],")":[88],"1/20.":[90]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":6}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
