{"id":"https://openalex.org/W2096046678","doi":"https://doi.org/10.1109/isscc.2008.4523214","title":"A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-\u00bf Metal-Gate CMOS Technology","display_name":"A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-\u00bf Metal-Gate CMOS Technology","publication_year":2008,"publication_date":"2008-02-01","ids":{"openalex":"https://openalex.org/W2096046678","doi":"https://doi.org/10.1109/isscc.2008.4523214","mag":"2096046678"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2008.4523214","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2008.4523214","pdf_url":null,"source":{"id":"https://openalex.org/S4210210374","display_name":"Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference","issn_l":"0193-6530","issn":["0193-6530","2376-8606"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063387912","display_name":"Fatih Hamzaoglu","orcid":"https://orcid.org/0000-0003-3500-5007"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Fatih Hamzaoglu","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Kevin Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin Zhang","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066037916","display_name":"Yih Wang","orcid":"https://orcid.org/0000-0002-4580-2870"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yih Wang","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049124192","display_name":"Hong Jo Ahn","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hong Jo Ahn","raw_affiliation_strings":["Intel, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103485789","display_name":"Uddalak Bhattacharya","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Uddalak Bhattacharya","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071255345","display_name":"Zhanping Chen","orcid":"https://orcid.org/0000-0002-2844-459X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhanping Chen","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036589180","display_name":"Yong-Gee Ng","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yong-Gee Ng","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028187021","display_name":"A. Pavlov","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrei Pavlov","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074241537","display_name":"Ken Smits","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ken Smits","raw_affiliation_strings":["Intel, Santa Clara, CA, USA","Intel, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"Intel, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Santa Clara, CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029885341","display_name":"M. Bohr","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Bohr","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Hillsboro OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro OR","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5063387912"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":8.8141,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.98037334,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"376","last_page":"621"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.743141770362854},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7078949213027954},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5291441082954407},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5053894519805908},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.5039426684379578},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.451797217130661},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4429769814014435},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4288368821144104},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.42083853483200073},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.41084909439086914},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3865607976913452},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38543567061424255},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3046967387199402},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.2806508541107178},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2723742723464966},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11419457197189331}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.743141770362854},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7078949213027954},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5291441082954407},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5053894519805908},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5039426684379578},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.451797217130661},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4429769814014435},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4288368821144104},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.42083853483200073},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.41084909439086914},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3865607976913452},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38543567061424255},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3046967387199402},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2806508541107178},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2723742723464966},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11419457197189331},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2008.4523214","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2008.4523214","pdf_url":null,"source":{"id":"https://openalex.org/S4210210374","display_name":"Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference","issn_l":"0193-6530","issn":["0193-6530","2376-8606"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1979682633","https://openalex.org/W2001894083","https://openalex.org/W2002612140","https://openalex.org/W2003874403","https://openalex.org/W2041626447","https://openalex.org/W2097207701","https://openalex.org/W2099911327","https://openalex.org/W2104572483","https://openalex.org/W2108911707","https://openalex.org/W2150938923","https://openalex.org/W2168101540","https://openalex.org/W2170113561","https://openalex.org/W2540193588","https://openalex.org/W3148792909","https://openalex.org/W4250703801"],"related_works":["https://openalex.org/W4392590355","https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W2662219006","https://openalex.org/W2519754576","https://openalex.org/W3022464115","https://openalex.org/W3092470009","https://openalex.org/W1567750437"],"abstract_inverted_index":{"We":[0],"report":[1],"a":[2,10,100],"153Mb":[3],"SRAM":[4],"design":[5,20,69,86,115],"that":[6],"is":[7,54],"optimized":[8],"for":[9,99],"45nm":[11],"high-K":[12],"metal-gate":[13],"technology":[14],"(Mistry":[15],"et":[16,51],"al.,":[17,52],"2007).":[18,113],"The":[19,39,66,81,114],"contains":[21],"fully":[22],"integrated":[23],"dynamic":[24,40],"forward-body-bias":[25],"to":[26,77,91],"achieve":[27],"lower":[28],"voltage":[29],"operation":[30],"while":[31],"keeping":[32],"low":[33],"the":[34,47,71,85,89,96,105],"area":[35],"and":[36,61],"power":[37,79],"overhead.":[38],"sleep":[41,68],"design,":[42],"which":[43],"was":[44],"developed":[45],"at":[46,119],"65nm":[48],"node":[49],"(Zhang":[50],"2005),":[53],"further":[55,78],"enhanced":[56],"with":[57],"op-amp-based":[58],"active-feedback":[59],"control":[60],"on-die":[62],"programmable":[63],"reference-voltage":[64],"generator.":[65],"new":[67],"reduces":[70],"effect":[72],"of":[73,84],"PVT":[74],"variation,":[75],"leading":[76],"reduction.":[80],"modular":[82],"architecture":[83],"also":[87],"enables":[88],"16KB-subarray":[90],"be":[92],"used":[93],"directly":[94],"as":[95],"building":[97],"block":[98],"6MB":[101],"L2":[102],"cache":[103],"in":[104],"Core":[106],"<sup":[107],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[108],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">TM</sup>":[109],"2":[110],"CPU":[111],"(George,":[112],"operates":[116],"over":[117],"3.5GHz":[118],"1.1V.":[120]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}
