{"id":"https://openalex.org/W2160896478","doi":"https://doi.org/10.1109/isscc.2006.1696327","title":"Thyristor-Based Volatile Memory in Nano-Scale CMOS","display_name":"Thyristor-Based Volatile Memory in Nano-Scale CMOS","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2160896478","doi":"https://doi.org/10.1109/isscc.2006.1696327","mag":"2160896478"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2006.1696327","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2006.1696327","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083258901","display_name":"Rahul Roy","orcid":"https://orcid.org/0000-0002-4026-1307"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R. Roy","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005323024","display_name":"F. Nemati","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"F. Nemati","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109148579","display_name":"K.K. Young","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K. Young","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048331322","display_name":"B. Bateman","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"B. Bateman","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043973500","display_name":"Rajesh Chopra","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"R. Chopra","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109424862","display_name":"Seong-Ook Jung","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Seong-Ook Jung","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5098551173","display_name":"Chiming Show","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chiming Show","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100750119","display_name":"Hyun\u2010Jin Cho","orcid":"https://orcid.org/0000-0002-6518-351X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hyun-Jin Cho","raw_affiliation_strings":["T-RAM Semiconductor, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"T-RAM Semiconductor, Inc., San Jose, CA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5083258901"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3761,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6816348,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"2612","last_page":"2621"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7479923963546753},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7069641351699829},{"id":"https://openalex.org/keywords/thyristor","display_name":"Thyristor","score":0.6921492218971252},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5150187015533447},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.45709341764450073},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41748297214508057},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3612648546695709},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29847079515457153},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25771671533584595},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.20247304439544678},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.17201745510101318},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.16369950771331787},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.06825330853462219}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7479923963546753},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7069641351699829},{"id":"https://openalex.org/C121922863","wikidata":"https://www.wikidata.org/wiki/Q180805","display_name":"Thyristor","level":3,"score":0.6921492218971252},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5150187015533447},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.45709341764450073},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41748297214508057},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3612648546695709},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29847079515457153},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25771671533584595},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.20247304439544678},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.17201745510101318},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.16369950771331787},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.06825330853462219}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2006.1696327","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2006.1696327","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1578205149","https://openalex.org/W1979146524","https://openalex.org/W2000014989","https://openalex.org/W2171162600","https://openalex.org/W2540974353","https://openalex.org/W6729399298"],"related_works":["https://openalex.org/W4213279392","https://openalex.org/W2379676388","https://openalex.org/W2725874044","https://openalex.org/W2365452505","https://openalex.org/W2059544191","https://openalex.org/W3009399878","https://openalex.org/W614960760","https://openalex.org/W2092371272","https://openalex.org/W2042526628","https://openalex.org/W2119025037"],"abstract_inverted_index":{"A":[0,35],"thyristor-based":[1],"memory":[2],"cell":[3,51],"technology":[4,19],"provides":[5],"SRAM-like":[6],"performance":[7],"at":[8],"2times":[9],"to":[10],"3times":[11],"the":[12],"density":[13],"of":[14],"conventional":[15,24],"6T":[16],"SRAM.":[17],"The":[18],"is":[20],"readily":[21],"embedded":[22],"into":[23,29],"nano-scale":[25],"CMOS":[26],"and":[27,32],"scales":[28],"future":[30],"SOI":[31,42],"FinFET":[33],"technologies.":[34],"19mm":[36],"<sup":[37,48],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[38,49],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[39,50],"0.13\u03bcm":[40],"9Mb":[41],"test":[43],"chip":[44],"has":[45],"a":[46,53],"0.562\u03bcm":[47],"with":[52],"cell-R/W":[54],"time":[55],"<2ns":[56]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}