{"id":"https://openalex.org/W2147271496","doi":"https://doi.org/10.1109/isscc.2006.1696215","title":"A 120Mvertices/s multi-threaded VLIW vertex processor for mobile multimedia applications","display_name":"A 120Mvertices/s multi-threaded VLIW vertex processor for mobile multimedia applications","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2147271496","doi":"https://doi.org/10.1109/isscc.2006.1696215","mag":"2147271496"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2006.1696215","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2006.1696215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049593355","display_name":"Chang-Hyo Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chang-Hyo Yu","raw_affiliation_strings":["KAIST, Daejeon, Korea","KAIST Daejeon"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"KAIST, Daejeon, Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"KAIST Daejeon","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109166888","display_name":"Kyu-Sik Chung","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyusik Chung","raw_affiliation_strings":["KAIST, Daejeon, Korea","KAIST Daejeon"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"KAIST, Daejeon, Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"KAIST Daejeon","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100454659","display_name":"Dong\u2010Hyun Kim","orcid":"https://orcid.org/0000-0001-9807-4064"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Donghyun Kim","raw_affiliation_strings":["KAIST, Daejeon, Korea","KAIST Daejeon"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"KAIST, Daejeon, Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"KAIST Daejeon","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052390471","display_name":"Lee\u2010Sup Kim","orcid":"https://orcid.org/0000-0001-9585-4591"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Lee-Sup Kim","raw_affiliation_strings":["KAIST, Daejeon, Korea","KAIST Daejeon"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"KAIST, Daejeon, Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"KAIST Daejeon","institution_ids":["https://openalex.org/I157485424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I157485424"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1606","last_page":"1615"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.98580002784729,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9807999730110168,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.9232988953590393},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.8761446475982666},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8364568948745728},{"id":"https://openalex.org/keywords/vertex","display_name":"Vertex (graph theory)","score":0.5440028309822083},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.47954389452934265},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4329826235771179},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4151241183280945},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3556944727897644},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.09843790531158447}],"concepts":[{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.9232988953590393},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.8761446475982666},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8364568948745728},{"id":"https://openalex.org/C80899671","wikidata":"https://www.wikidata.org/wiki/Q1304193","display_name":"Vertex (graph theory)","level":3,"score":0.5440028309822083},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.47954389452934265},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4329826235771179},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4151241183280945},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3556944727897644},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.09843790531158447},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2006.1696215","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2006.1696215","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1538115619","https://openalex.org/W1541963660","https://openalex.org/W2126013304","https://openalex.org/W4234187225","https://openalex.org/W6632398689","https://openalex.org/W6816620233"],"related_works":["https://openalex.org/W2099279072","https://openalex.org/W1580556151","https://openalex.org/W2144463068","https://openalex.org/W2185915791","https://openalex.org/W2129565950","https://openalex.org/W37969803","https://openalex.org/W2120705320","https://openalex.org/W1996820488","https://openalex.org/W2154356865","https://openalex.org/W2099025818"],"abstract_inverted_index":{"A":[0],"3D":[1],"vertex":[2,15],"processor":[3],"with":[4,41],"a":[5,13,24,42],"floating-point":[6],"4-threaded":[7],"and":[8,12,38],"4-issue":[9],"VLIW":[10],"architecture":[11,31],"TnL":[14],"cache":[16],"is":[17],"implemented":[18],"for":[19],"mobile":[20],"multimedia":[21],"applications":[22],"in":[23],"0.18\u03bcm":[25],"4M":[26],"CMOS":[27],"process.":[28],"The":[29],"proposed":[30],"efficiently":[32],"reduces":[33],"the":[34],"total":[35],"energy":[36],"consumption":[37],"achieves":[39],"120Mvertices/s":[40],"2.5GFLOPS":[43],"datapath":[44],"using":[45],"157mW":[46],"when":[47],"operating":[48],"at":[49],"100MHz":[50]},"counts_by_year":[{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}