{"id":"https://openalex.org/W2093779526","doi":"https://doi.org/10.1109/isscc.2006.1696192","title":"A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS","display_name":"A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS","publication_year":2006,"publication_date":"2006-01-01","ids":{"openalex":"https://openalex.org/W2093779526","doi":"https://doi.org/10.1109/isscc.2006.1696192","mag":"2093779526"},"language":"en","primary_location":{"id":"doi:10.1109/isscc.2006.1696192","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2006.1696192","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079858274","display_name":"Yorgos Palaskas","orcid":"https://orcid.org/0000-0003-0551-7327"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Y. Palaskas","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058466731","display_name":"Ashoke Ravi","orcid":"https://orcid.org/0000-0001-8302-622X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Ravi","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065695022","display_name":"Stefano Pellerano","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Pellerano","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059381050","display_name":"Brent Carlton","orcid":"https://orcid.org/0000-0003-4542-4715"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B.R. Carlton","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009890288","display_name":"M. Elmala","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.A. Elmala","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012867674","display_name":"R. Bishop","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Bishop","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102785192","display_name":"Gaurab Banerjee","orcid":"https://orcid.org/0000-0003-4858-7683"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Banerjee","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030535374","display_name":"Rich B. Nicholls","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R.B. Nicholls","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066720175","display_name":"S. Ling","orcid":"https://orcid.org/0009-0007-5953-3097"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Ling","raw_affiliation_strings":["Intel, Folsom, CA"],"affiliations":[{"raw_affiliation_string":"Intel, Folsom, CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102073001","display_name":"Stewart S. Taylor","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.S. Taylor","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062357544","display_name":"K. Soumyanath","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Soumyanath","raw_affiliation_strings":["Intel, Hillsboro, OR"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":["https://openalex.org/A5079858274"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":4.5131,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.94418507,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1420","last_page":"1429"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8326368927955627},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.7990881204605103},{"id":"https://openalex.org/keywords/mimo","display_name":"MIMO","score":0.5415568351745605},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.44704416394233704},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.44035810232162476},{"id":"https://openalex.org/keywords/microstrip","display_name":"Microstrip","score":0.43378984928131104},{"id":"https://openalex.org/keywords/system-in-package","display_name":"System in package","score":0.4272312521934509},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4271640479564667},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.4257190227508545},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4110584855079651},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.402650386095047},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.3456982374191284},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.33985286951065063},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26166704297065735}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8326368927955627},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.7990881204605103},{"id":"https://openalex.org/C207987634","wikidata":"https://www.wikidata.org/wiki/Q176862","display_name":"MIMO","level":3,"score":0.5415568351745605},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.44704416394233704},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.44035810232162476},{"id":"https://openalex.org/C123657345","wikidata":"https://www.wikidata.org/wiki/Q639055","display_name":"Microstrip","level":2,"score":0.43378984928131104},{"id":"https://openalex.org/C146667757","wikidata":"https://www.wikidata.org/wiki/Q1457198","display_name":"System in package","level":3,"score":0.4272312521934509},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4271640479564667},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.4257190227508545},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4110584855079651},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.402650386095047},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.3456982374191284},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.33985286951065063},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26166704297065735}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isscc.2006.1696192","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isscc.2006.1696192","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1542459541","https://openalex.org/W2129523136","https://openalex.org/W2167191969","https://openalex.org/W2169764616","https://openalex.org/W6632383558"],"related_works":["https://openalex.org/W2783437851","https://openalex.org/W4249165909","https://openalex.org/W1672137312","https://openalex.org/W1650483958","https://openalex.org/W2320869333","https://openalex.org/W1924731896","https://openalex.org/W2744385696","https://openalex.org/W2040472248","https://openalex.org/W2184749983","https://openalex.org/W2081165985"],"abstract_inverted_index":{"A":[0],"5GHz":[1,33],"2times2":[2],"MIMO":[3],"transceiver":[4],"in":[5,42],"90nm":[6],"CMOS":[7],"supports":[8],"spatial":[9],"multiplexing":[10],"and":[11],"diversity,":[12],"achieving":[13],"54/108Mb/s":[14],"with":[15,39],"-75/-63dBm":[16],"sensitivity":[17],"for":[18],"an":[19],"AWGN/25ns-Rayleigh":[20],"channel,":[21],"respectively.":[22,45],"Each":[23,31],"RX":[24],"draws":[25],"120mA":[26],"from":[27],"a":[28,53,57],"1.4V":[29],"supply.":[30],"3.3V":[32],"PA":[34],"delivers":[35],"+16/+13dBm":[36],"average":[37],"power":[38],"-25/-27dB":[40],"EVM":[41],"1times1/2times2":[43],"modes,":[44],"The":[46],"system-in-package":[47],"including":[48],"microstrip":[49],"front-end":[50],"matching":[51],"on":[52],"flip-chip":[54],"package":[55],"occupies":[56],"die":[58],"area":[59],"of":[60],"18mm":[61],"<sup":[62],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[63],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[64]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
