{"id":"https://openalex.org/W7162633968","doi":"https://doi.org/10.1109/isqed69900.2026.11534690","title":"HDL-DFGen: A Digital Filter Hardware Description Generation Framework","display_name":"HDL-DFGen: A Digital Filter Hardware Description Generation Framework","publication_year":2026,"publication_date":"2026-04-08","ids":{"openalex":"https://openalex.org/W7162633968","doi":"https://doi.org/10.1109/isqed69900.2026.11534690"},"language":null,"primary_location":{"id":"doi:10.1109/isqed69900.2026.11534690","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed69900.2026.11534690","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 27th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5137217026","display_name":"Pedro T. L. Pereira","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Pedro T. L. Pereira","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS),Graduate Program in Microelectronics (PGMicro),Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS),Graduate Program in Microelectronics (PGMicro),Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115826066","display_name":"Eduardo Da Costa","orcid":null},"institutions":[{"id":"https://openalex.org/I126460647","display_name":"Universidade Federal do Rio Grande","ror":"https://ror.org/05hpfkn88","country_code":"BR","type":"education","lineage":["https://openalex.org/I126460647"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Eduardo Da Costa","raw_affiliation_strings":["Federal University of Rio Grande (FURG),Graduate Program on Computing,Rio Grande,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande (FURG),Graduate Program on Computing,Rio Grande,Brazil","institution_ids":["https://openalex.org/I126460647"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046426137","display_name":"S\u00e9rgio Bampi","orcid":"https://orcid.org/0000-0002-9018-6309"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Sergio Bampi","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS),Graduate Program in Microelectronics (PGMicro),Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS),Graduate Program in Microelectronics (PGMicro),Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.66046888,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6635000109672546,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.6635000109672546,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.044199999421834946,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11450","display_name":"Model-Driven Software Engineering Techniques","score":0.02590000070631504,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4375},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.4146000146865845},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.27799999713897705},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.27070000767707825}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6545000076293945},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4375},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.4146000146865845},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3741999864578247},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.29330000281333923},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2800999879837036},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.27799999713897705},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.27070000767707825},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.2687999904155731},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.2524000108242035}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed69900.2026.11534690","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed69900.2026.11534690","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 27th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1527793340","https://openalex.org/W1656104036","https://openalex.org/W1965514520","https://openalex.org/W2145311151","https://openalex.org/W2243310984","https://openalex.org/W2944532434","https://openalex.org/W3206051240","https://openalex.org/W4312492995","https://openalex.org/W4385625022","https://openalex.org/W4392862239","https://openalex.org/W4402216493","https://openalex.org/W4405947445","https://openalex.org/W4406014556","https://openalex.org/W4413145157","https://openalex.org/W4413553306"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"HDL-DFGen,":[3],"a":[4,38],"framework":[5,83],"for":[6,103],"automatically":[7,127],"generating":[8],"digital":[9],"filter":[10,57,65],"architectures":[11,31,129],"in":[12,79],"VHDL":[13],"and":[14,28,45,62,67,74,88,120,138],"Verilog.":[15],"The":[16,81],"tool":[17],"supports":[18],"fixed":[19],"FIR":[20],"filters,":[21],"adaptive":[22],"filters":[23,113],"from":[24],"the":[25,86,98,109,126],"LMS":[26],"family,":[27],"novel":[29],"reconfigurable":[30],"capable":[32],"of":[33,60,100,111],"implementing":[34],"multiple":[35],"algorithms":[36],"within":[37],"single":[39],"circuit.":[40],"By":[41],"combining":[42],"parameterizable":[43],"templates":[44],"reusable":[46],"libraries,":[47],"HDL-DFGen":[48,107],"allows":[49],"designers":[50],"to":[51,91],"specify":[52],"key":[53],"requirements,":[54],"such":[55],"as":[56],"length,":[58],"precision":[59],"integer":[61],"fractional":[63],"parts,":[64],"type,":[66],"architectural":[68],"configuration":[69],"(parallel,":[70],"semi-parallel,":[71],"or":[72],"sequential),":[73],"obtain":[75],"complete":[76],"hardware":[77],"descriptions":[78],"seconds.":[80],"proposed":[82],"significantly":[84],"reduces":[85],"time":[87],"effort":[89],"required":[90],"design":[92],"complex":[93],"VLSI":[94],"architectures,":[95],"thus":[96],"favoring":[97],"development":[99],"dedicated":[101],"circuits":[102],"signal":[104],"processing":[105,139],"applications.":[106],"enables":[108],"creation":[110],"high-order":[112],"with":[114],"scalable":[115],"performance":[116],"while":[117],"preserving":[118],"area":[119],"power":[121,136],"efficiency.":[122],"Results":[123],"demonstrate":[124],"that":[125],"generated":[128],"achieve":[130],"competitive":[131],"metrics":[132],"regarding":[133],"circuit":[134],"complexity,":[135],"consumption,":[137],"throughput.":[140]},"counts_by_year":[],"updated_date":"2026-05-30T06:14:24.967023","created_date":"2026-05-29T00:00:00"}
