{"id":"https://openalex.org/W7162675956","doi":"https://doi.org/10.1109/isqed69900.2026.11534662","title":"ULTRARAM: An Emerging Memory Technology for NVM and Low-Power Neuromorphic Systems","display_name":"ULTRARAM: An Emerging Memory Technology for NVM and Low-Power Neuromorphic Systems","publication_year":2026,"publication_date":"2026-04-08","ids":{"openalex":"https://openalex.org/W7162675956","doi":"https://doi.org/10.1109/isqed69900.2026.11534662"},"language":null,"primary_location":{"id":"doi:10.1109/isqed69900.2026.11534662","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed69900.2026.11534662","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 27th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5130372160","display_name":"Abhishek Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abhishek Kumar","raw_affiliation_strings":["University of California at Berkeley,Department of Electrical Engineering and Computer Sciences,CA,USA,94720"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California at Berkeley,Department of Electrical Engineering and Computer Sciences,CA,USA,94720","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048795859","display_name":"Peter Hodgson","orcid":"https://orcid.org/0000-0001-5813-8772"},"institutions":[{"id":"https://openalex.org/I67415387","display_name":"Lancaster University","ror":"https://ror.org/04f2nsd36","country_code":"GB","type":"education","lineage":["https://openalex.org/I67415387"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Peter D. Hodgson","raw_affiliation_strings":["Lancaster University,Department of Physics,Lancaster,United Kingdom,LA1 4YB"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lancaster University,Department of Physics,Lancaster,United Kingdom,LA1 4YB","institution_ids":["https://openalex.org/I67415387"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5137267594","display_name":"James Ashforth-Pook","orcid":null},"institutions":[{"id":"https://openalex.org/I67415387","display_name":"Lancaster University","ror":"https://ror.org/04f2nsd36","country_code":"GB","type":"education","lineage":["https://openalex.org/I67415387"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"James Ashforth-Pook","raw_affiliation_strings":["Quinas Technology Limited,Lancaster,United Kingdom,LA1 4YB"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Quinas Technology Limited,Lancaster,United Kingdom,LA1 4YB","institution_ids":["https://openalex.org/I67415387"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076744507","display_name":"M. Hayne","orcid":"https://orcid.org/0000-0001-5224-9156"},"institutions":[{"id":"https://openalex.org/I67415387","display_name":"Lancaster University","ror":"https://ror.org/04f2nsd36","country_code":"GB","type":"education","lineage":["https://openalex.org/I67415387"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Manus Hayne","raw_affiliation_strings":["Lancaster University,Department of Physics,Lancaster,United Kingdom,LA1 4YB"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lancaster University,Department of Physics,Lancaster,United Kingdom,LA1 4YB","institution_ids":["https://openalex.org/I67415387"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041706983","display_name":"Avirup Dasgupta","orcid":"https://orcid.org/0000-0001-7477-0436"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Avirup Dasgupta","raw_affiliation_strings":["Indian Institute of Technology Roorkee,Department of Electronics &#x0026; Communication Engineering,Roorkee,India,247667"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Roorkee,Department of Electronics &#x0026; Communication Engineering,Roorkee,India,247667","institution_ids":["https://openalex.org/I154851008"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.8621000051498413,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.8621000051498413,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.09560000151395798,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.009499999694526196,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.6384999752044678},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4058000147342682},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.3357999920845032},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3296999931335449},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3089999854564667},{"id":"https://openalex.org/keywords/emerging-technologies","display_name":"Emerging technologies","score":0.3003999888896942}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.6384999752044678},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5503000020980835},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4058000147342682},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38370001316070557},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.3357999920845032},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.335099995136261},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3296999931335449},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3089999854564667},{"id":"https://openalex.org/C207267971","wikidata":"https://www.wikidata.org/wiki/Q120208","display_name":"Emerging technologies","level":2,"score":0.3003999888896942},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3003000020980835},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3001999855041504},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2897999882698059},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.288100004196167},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2782999873161316},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.27639999985694885},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.2565000057220459}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed69900.2026.11534662","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed69900.2026.11534662","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 27th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.724394679069519,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321977","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W1753784006","https://openalex.org/W1969562914","https://openalex.org/W2016922062","https://openalex.org/W2030671441","https://openalex.org/W2041446224","https://openalex.org/W2069604140","https://openalex.org/W2071205369","https://openalex.org/W2080842078","https://openalex.org/W2131177180","https://openalex.org/W2161156247","https://openalex.org/W2171888576","https://openalex.org/W2433248078","https://openalex.org/W2462963692","https://openalex.org/W2545613065","https://openalex.org/W2604489357","https://openalex.org/W2623635728","https://openalex.org/W2787453651","https://openalex.org/W2790669755","https://openalex.org/W2910993390","https://openalex.org/W2939122536","https://openalex.org/W3013080934","https://openalex.org/W3023396632","https://openalex.org/W3033898041","https://openalex.org/W3112740243","https://openalex.org/W3134347048","https://openalex.org/W3136117125","https://openalex.org/W3172130831","https://openalex.org/W4205754660","https://openalex.org/W4285361316","https://openalex.org/W4317793297","https://openalex.org/W4317793326","https://openalex.org/W4377969841","https://openalex.org/W4396710804","https://openalex.org/W4405022738","https://openalex.org/W4413908737"],"related_works":[],"abstract_inverted_index":{"ULTRARAM":[0,117],"is":[1,57,97],"an":[2,116],"emerging":[3,80],"memory":[4,28,43],"technology":[5,87],"exhibiting":[6],"high":[7],"endurance":[8],"($\\gt10^{7}":[9],"\\mathbf{P}":[10],"/":[11],"\\mathbf{E}$":[12],"cycles),":[13],"ultra-high":[14],"retention":[15],"($\\gt1000$":[16],"years),":[17],"and":[18,50,72,101,113],"ultra-low":[19],"switching":[20],"energy":[21],"per":[22],"unit":[23],"area.":[24],"This":[25],"compound-semiconductor-based":[26],"non-volatile":[27,91],"(NVM)":[29],"works":[30],"on":[31,48],"the":[32,62,68,83,103],"principle":[33],"of":[34,65,85,109,115],"triple-barrier":[35],"resonant":[36],"tunneling":[37],"(TBRT)":[38],"using":[39],"InAs/AlSb":[40],"heterostructures.":[41],"Single":[42],"cells":[44],"have":[45],"been":[46],"fabricated":[47],"GaAs":[49],"Si":[51],"substrates.":[52],"A":[53],"physicsbased":[54],"compact":[55],"model":[56],"proposed":[58],"to":[59,99],"accurately":[60],"capture":[61],"realtime":[63],"trapping/de-trapping":[64],"charges":[66],"in":[67,107],"floating":[69],"gate":[70],"(FG)":[71],"utilized":[73],"for":[74],"synapse":[75],"simulations.":[76],"Benchmarking":[77],"with":[78],"other":[79],"memories":[81],"highlight":[82],"promise":[84],"this":[86],"as":[88],"a":[89,94],"next-generation":[90],"memory.":[92],"Specifically,":[93],"circuit-level":[95],"macro-model":[96],"employed":[98],"evaluate":[100],"benchmark":[102],"onchip":[104],"learning":[105],"performance":[106],"terms":[108],"area,":[110],"latency,":[111],"energy,":[112],"accuracy":[114],"synaptic":[118],"core.":[119]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-05-29T00:00:00"}
