{"id":"https://openalex.org/W4410887436","doi":"https://doi.org/10.1109/isqed65160.2025.11014376","title":"Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-Precision Quantized Multiplication on Hardware Accelerators","display_name":"Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-Precision Quantized Multiplication on Hardware Accelerators","publication_year":2025,"publication_date":"2025-04-23","ids":{"openalex":"https://openalex.org/W4410887436","doi":"https://doi.org/10.1109/isqed65160.2025.11014376"},"language":"en","primary_location":{"id":"doi:10.1109/isqed65160.2025.11014376","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed65160.2025.11014376","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 26th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2602.23334","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100366687","display_name":"Yuhao Liu","orcid":"https://orcid.org/0000-0002-7281-2126"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Yuhao Liu","raw_affiliation_strings":["Dresden University of Technology,Germany"],"affiliations":[{"raw_affiliation_string":"Dresden University of Technology,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028792027","display_name":"Salim Ullah","orcid":"https://orcid.org/0000-0002-9774-9522"},"institutions":[{"id":"https://openalex.org/I904495901","display_name":"Ruhr University Bochum","ror":"https://ror.org/04tsk2644","country_code":"DE","type":"education","lineage":["https://openalex.org/I904495901"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Salim Ullah","raw_affiliation_strings":["Ruhr University,Bochum,Germany"],"affiliations":[{"raw_affiliation_string":"Ruhr University,Bochum,Germany","institution_ids":["https://openalex.org/I904495901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100755285","display_name":"Akash Kumar","orcid":"https://orcid.org/0000-0001-7125-1737"},"institutions":[{"id":"https://openalex.org/I904495901","display_name":"Ruhr University Bochum","ror":"https://ror.org/04tsk2644","country_code":"DE","type":"education","lineage":["https://openalex.org/I904495901"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Akash Kumar","raw_affiliation_strings":["Ruhr University,Bochum,Germany"],"affiliations":[{"raw_affiliation_string":"Ruhr University,Bochum,Germany","institution_ids":["https://openalex.org/I904495901"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100366687"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10584469,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7261964082717896},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.6918544769287109},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.6817589998245239},{"id":"https://openalex.org/keywords/bitwise-operation","display_name":"Bitwise operation","score":0.6312484741210938},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5569524168968201},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5159114599227905},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4996786117553711},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4764707088470459},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42114561796188354},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3255804479122162},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1574506163597107},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.09585878252983093},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07315358519554138}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7261964082717896},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.6918544769287109},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.6817589998245239},{"id":"https://openalex.org/C134765980","wikidata":"https://www.wikidata.org/wiki/Q879126","display_name":"Bitwise operation","level":2,"score":0.6312484741210938},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5569524168968201},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5159114599227905},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4996786117553711},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4764707088470459},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42114561796188354},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3255804479122162},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1574506163597107},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.09585878252983093},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07315358519554138},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/isqed65160.2025.11014376","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed65160.2025.11014376","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 26th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:2602.23334","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2602.23334","pdf_url":"https://arxiv.org/pdf/2602.23334","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},{"id":"pmh:doi:10.48550/arxiv.2602.23334","is_oa":true,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4406922384","display_name":"Open MIND","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"publisher-specific-oa","license_id":"https://openalex.org/licenses/publisher-specific-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2602.23334","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2602.23334","pdf_url":"https://arxiv.org/pdf/2602.23334","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5106512922","display_name":null,"funder_award_id":"Deutsche Forschungsgemeinschaft (DFG","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G6024419964","display_name":null,"funder_award_id":"Deutsche Forschungsgemeinschaft (DFG)","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G6052429835","display_name":null,"funder_award_id":"(DFG)","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G7276696126","display_name":null,"funder_award_id":"380524764","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"},{"id":"https://openalex.org/G762232396","display_name":null,"funder_award_id":"Project","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"pdf":true,"grobid_xml":false},"content_urls":{"pdf":"https://content.openalex.org/works/W4410887436.pdf"},"referenced_works_count":25,"referenced_works":["https://openalex.org/W2007339694","https://openalex.org/W2012770817","https://openalex.org/W2112796928","https://openalex.org/W2129933855","https://openalex.org/W2158685723","https://openalex.org/W2160311569","https://openalex.org/W2565125333","https://openalex.org/W2795578121","https://openalex.org/W2810704618","https://openalex.org/W2891946740","https://openalex.org/W2936278485","https://openalex.org/W2949275038","https://openalex.org/W2963367920","https://openalex.org/W2982479999","https://openalex.org/W3008905965","https://openalex.org/W3014011758","https://openalex.org/W3093982621","https://openalex.org/W3204960814","https://openalex.org/W4212886211","https://openalex.org/W4213013241","https://openalex.org/W4280493494","https://openalex.org/W4312310654","https://openalex.org/W4387010611","https://openalex.org/W4402187401","https://openalex.org/W6790648521"],"related_works":["https://openalex.org/W4240320454","https://openalex.org/W2070314832","https://openalex.org/W2395557210","https://openalex.org/W1594590521","https://openalex.org/W2347854075","https://openalex.org/W1967938402","https://openalex.org/W2132614232","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W4402187401"],"abstract_inverted_index":{"Neural":[0,83],"network":[1],"accelerators":[2],"have":[3,21,104],"been":[4],"widely":[5],"applied":[6],"to":[7,31,40,60,123],"edge":[8],"devices":[9],"for":[10,70,79,100],"complex":[11],"tasks":[12],"like":[13],"object":[14],"tracking,":[15],"image":[16],"recognition,":[17],"etc.":[18],"Previous":[19],"works":[20],"explored":[22],"the":[23,76,111],"quantization":[24,48],"technologies":[25],"in":[26,44,57,87,126],"related":[27],"lightweight":[28],"accelerator":[29],"designs":[30,69],"reduce":[32],"hardware":[33,73],"resource":[34,63],"consumption.":[35],"However,":[36],"low":[37],"precision":[38,56,77],"leads":[39],"high":[41],"accuracy":[42],"loss":[43],"inference.":[45],"Therefore,":[46],"mixed-precision":[47,128],"becomes":[49],"an":[50],"alternative":[51],"solution":[52],"by":[53],"applying":[54],"different":[55,58],"layers":[59],"trade":[61],"off":[62],"consumption":[64],"and":[65,106,130],"accuracy.":[66],"Because":[67],"regular":[68],"multiplication":[71],"on":[72,110],"cannot":[74],"support":[75],"reconfiguration":[78],"a":[80,91],"multi-precision":[81,94],"Quantized":[82],"Network":[84],"(QNN)":[85],"model":[86],"runtime,":[88],"we":[89],"propose":[90],"runtime":[92],"reconfigurable":[93],"multi-channel":[95],"bitwise":[96],"systolic":[97],"array":[98],"design":[99],"QNN":[101],"accelerators.":[102],"We":[103],"implemented":[105],"evaluated":[107],"our":[108,118],"work":[109,119],"Ultra96":[112],"FPGA":[113],"platform.":[114],"Results":[115],"show":[116],"that":[117],"can":[120],"achieve":[121],"1.3185\u00d7":[122],"3.5671\u00d7":[124],"speedup":[125],"inferring":[127],"models":[129],"has":[131],"less":[132],"critical":[133],"path":[134],"delay,":[135],"supporting":[136],"higher":[137],"clock":[138],"frequency":[139],"(250MHz).":[140]},"counts_by_year":[],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}
