{"id":"https://openalex.org/W4396949230","doi":"https://doi.org/10.1109/isqed60706.2024.10528712","title":"A novel virtual prototyping methodology for timing-accurate simulation of AMS circuits","display_name":"A novel virtual prototyping methodology for timing-accurate simulation of AMS circuits","publication_year":2024,"publication_date":"2024-04-03","ids":{"openalex":"https://openalex.org/W4396949230","doi":"https://doi.org/10.1109/isqed60706.2024.10528712"},"language":"en","primary_location":{"id":"doi:10.1109/isqed60706.2024.10528712","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed60706.2024.10528712","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 25th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5098660414","display_name":"Teo Vallone","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Teo Vallone","raw_affiliation_strings":["Politecnico di Milano,Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5098660415","display_name":"Hayri Verner Hasou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hayri Verner Hasou","raw_affiliation_strings":["Infineon Technologies Pavia,Italy"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies Pavia,Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054813714","display_name":"Ernesto Colizzi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ernesto Colizzi","raw_affiliation_strings":["Infineon Technologies Pavia,Italy"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies Pavia,Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070652829","display_name":"Sara Vinco","orcid":"https://orcid.org/0000-0001-9666-5194"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Sara Vinco","raw_affiliation_strings":["Politecnico di Torino,Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016373122","display_name":"Davide Zoni","orcid":"https://orcid.org/0000-0002-9951-062X"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Zoni","raw_affiliation_strings":["Politecnico di Milano,Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Milano,Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5098660414"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":0.5186,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58141909,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/virtual-prototyping","display_name":"Virtual prototyping","score":0.775510311126709},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6758372783660889},{"id":"https://openalex.org/keywords/vhdl-ams","display_name":"VHDL-AMS","score":0.5161174535751343},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5108458399772644},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38317012786865234},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3143197298049927},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.23928895592689514},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2226930558681488},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.152912437915802},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.1394115686416626},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.12679696083068848}],"concepts":[{"id":"https://openalex.org/C2780991453","wikidata":"https://www.wikidata.org/wiki/Q3408177","display_name":"Virtual prototyping","level":2,"score":0.775510311126709},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6758372783660889},{"id":"https://openalex.org/C2776513426","wikidata":"https://www.wikidata.org/wiki/Q2744740","display_name":"VHDL-AMS","level":4,"score":0.5161174535751343},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5108458399772644},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38317012786865234},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3143197298049927},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.23928895592689514},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2226930558681488},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.152912437915802},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.1394115686416626},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.12679696083068848}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed60706.2024.10528712","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed60706.2024.10528712","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 25th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2112173236","https://openalex.org/W2159674522","https://openalex.org/W2162855453","https://openalex.org/W2171212066","https://openalex.org/W2616765985","https://openalex.org/W2626517562","https://openalex.org/W2789621568","https://openalex.org/W2801292404","https://openalex.org/W2801958722","https://openalex.org/W2981537073","https://openalex.org/W3036532492","https://openalex.org/W3146847242","https://openalex.org/W3198544746","https://openalex.org/W4213423202","https://openalex.org/W4223922902","https://openalex.org/W4280571518"],"related_works":["https://openalex.org/W4309424937","https://openalex.org/W4298068326","https://openalex.org/W151568972","https://openalex.org/W2871206664","https://openalex.org/W4300894011","https://openalex.org/W4214795359","https://openalex.org/W2144351752","https://openalex.org/W4214970082","https://openalex.org/W4396949230","https://openalex.org/W2139636183"],"abstract_inverted_index":{"Nowadays,":[0],"analog-mixed-signal":[1],"(AMS)":[2],"circuits":[3],"are":[4,27,73,159,173,210],"at":[5,98,212],"the":[6,53,57,65,77,80,95,99,118,125,128,132,136,140,150,155,167,171,181,184,203,207],"core":[7],"of":[8,12,56,79,94,101,120,127,170,183,206],"a":[9,102,108,163],"large":[10],"variety":[11],"devices":[13],"targeting":[14],"automotive,":[15],"medical,":[16],"communication,":[17],"and":[18,35,90,124,196],"energy":[19],"applications.":[20],"Despite":[21],"their":[22],"ubiquity,":[23],"AMS":[24,81,114,122,153,190],"design":[25,88,96],"methodologies":[26],"not":[28],"automated,":[29],"rely":[30],"on":[31,52],"long":[32],"manual":[33],"iterations,":[34],"leverage":[36],"slow":[37],"SPICE-level":[38],"simulation":[39,85],"as":[40],"golden":[41],"standard.":[42],"Moreover,":[43],"SPICE":[44,213],"simulations":[45],"cannot":[46],"help":[47],"in":[48,64],"verifying":[49],"timing":[50,146,199],"checks":[51],"digital":[54,141,204],"elements":[55],"circuit,":[58],"thus":[59],"allowing":[60],"possible":[61],"escaped":[62],"bugs":[63],"final":[66,151],"device.":[67],"In":[68],"this":[69],"scenario,":[70],"virtual":[71,110],"prototypes":[72],"used":[74],"to":[75,83,187],"abstract":[76],"modeling":[78],"circuit":[82,123,172,208],"boost":[84],"speed,":[86],"favor":[87],"reuse,":[89],"allow":[91],"early":[92],"evaluation":[93],"choices":[97],"cost":[100],"reduced":[103],"accuracy.":[104],"This":[105],"paper":[106],"presents":[107],"novel":[109],"prototyping":[111],"methodology":[112,133,193],"for":[113,139,202],"circuits.":[115],"Starting":[116],"from":[117],"netlist":[119],"an":[121],"description":[126],"target":[129],"technology":[130],"library,":[131],"automatically":[134],"generates":[135],"SystemC":[137,157],"models":[138,158],"elements,":[142],"extended":[143],"with":[144],"additional":[145],"checks.":[147],"To":[148],"deliver":[149,188],"timing-accurate":[152,189],"simulation,":[154],"generated":[156],"then":[160],"integrated":[161],"into":[162],"co-simulation":[164],"framework":[165],"where":[166],"analog":[168],"parts":[169,205],"still":[174],"simulated":[175],"using":[176],"SPICE.":[177],"Experimental":[178],"results":[179],"demonstrated":[180],"validity":[182],"proposed":[185],"solution":[186],"simulations.":[191],"The":[192],"can":[194],"identify":[195],"check":[197],"five":[198],"violation":[200],"classes":[201],"that":[209],"unchecked":[211],"level.":[214]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2025-12-19T19:40:27.379048","created_date":"2025-10-10T00:00:00"}
