{"id":"https://openalex.org/W4377969787","doi":"https://doi.org/10.1109/isqed57927.2023.10129364","title":"DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision","display_name":"DSEAdd: FPGA based Design Space Exploration for Approximate Adders with Variable Bit-precision","publication_year":2023,"publication_date":"2023-04-05","ids":{"openalex":"https://openalex.org/W4377969787","doi":"https://doi.org/10.1109/isqed57927.2023.10129364"},"language":"en","primary_location":{"id":"doi:10.1109/isqed57927.2023.10129364","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed57927.2023.10129364","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110979971","display_name":"Archie Mishra","orcid":null},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Archie Mishra","raw_affiliation_strings":["International Institute of Information Technology,Bangalore,India","International Institute of Information Technology, Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology,Bangalore,India","institution_ids":["https://openalex.org/I181514455"]},{"raw_affiliation_string":"International Institute of Information Technology, Bangalore, India","institution_ids":["https://openalex.org/I181514455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101502774","display_name":"Nanditha Rao","orcid":"https://orcid.org/0000-0003-2369-0836"},"institutions":[{"id":"https://openalex.org/I181514455","display_name":"International Institute of Information Technology Bangalore","ror":"https://ror.org/05h9eqy10","country_code":"IN","type":"education","lineage":["https://openalex.org/I181514455"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nanditha Rao","raw_affiliation_strings":["International Institute of Information Technology,Bangalore,India","International Institute of Information Technology, Bangalore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology,Bangalore,India","institution_ids":["https://openalex.org/I181514455"]},{"raw_affiliation_string":"International Institute of Information Technology, Bangalore, India","institution_ids":["https://openalex.org/I181514455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I181514455"],"apc_list":null,"apc_paid":null,"fwci":2.1635,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.85879507,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9073569774627686},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7497217655181885},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5804033875465393},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5795005559921265},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.5720553994178772},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5330953001976013},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.46908631920814514},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.4412083625793457},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.43266865611076355},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4300561845302582},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3086886405944824},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1756836175918579},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1657792329788208}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9073569774627686},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7497217655181885},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5804033875465393},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5795005559921265},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.5720553994178772},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5330953001976013},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.46908631920814514},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.4412083625793457},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.43266865611076355},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4300561845302582},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3086886405944824},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1756836175918579},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1657792329788208},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed57927.2023.10129364","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed57927.2023.10129364","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1533950919","https://openalex.org/W2033110821","https://openalex.org/W2035378788","https://openalex.org/W2045294186","https://openalex.org/W2124495571","https://openalex.org/W2280900335","https://openalex.org/W2496519511","https://openalex.org/W2510992755","https://openalex.org/W2535375934","https://openalex.org/W2799036754","https://openalex.org/W2801205959","https://openalex.org/W2916991310","https://openalex.org/W2982216783","https://openalex.org/W3018203643","https://openalex.org/W3038222513","https://openalex.org/W3043004183","https://openalex.org/W3092362650","https://openalex.org/W3098543951","https://openalex.org/W3108764696","https://openalex.org/W3110814181"],"related_works":["https://openalex.org/W2083349434","https://openalex.org/W2046530291","https://openalex.org/W1495852898","https://openalex.org/W2336393408","https://openalex.org/W1577384672","https://openalex.org/W2266479786","https://openalex.org/W2224692227","https://openalex.org/W41546774","https://openalex.org/W2545291116","https://openalex.org/W2981356405"],"abstract_inverted_index":{"Functional":[0],"approximation":[1],"methods":[2],"have":[3],"been":[4],"used":[5],"to":[6,30,35,77,93,125,210],"exploit":[7],"the":[8,18,22,74,79,95,101,105,118,127,148,173,179,185],"inherent":[9],"error":[10],"tolerance":[11],"of":[12,24,90,100,112,120,150,162],"several":[13],"applications.":[14],"Approximate":[15],"computing":[16],"reduces":[17],"resources":[19],"utilized":[20],"at":[21,37,147,165,212],"cost":[23,149],"acceptable":[25],"accuracy":[26,71,99,180,189],"loss.":[27],"Designers":[28],"need":[29],"follow":[31],"a":[32,66,85,110,123,141,156,169,194,205],"systematic":[33],"approach":[34,75],"arrive":[36],"an":[38,52,137],"optimized":[39],"design":[40,55,114,139,207],"configuration":[41,195],"based":[42],"on":[43],"certain":[44,67],"constraints.":[45],"In":[46],"this":[47],"work,":[48],"we":[49,134,192,202],"present":[50],"DSEAdd:":[51],"FPGA-based":[53],"automated":[54],"space":[56],"exploration":[57],"(DSE)":[58],"framework":[59,107],"targeting":[60],"variable":[61],"bit-width":[62],"approximate":[63],"adders.":[64],"Given":[65],"area,":[68,96],"timing":[69],"or":[70,198],"(ATA)":[72],"constraint,":[73],"helps":[76],"identify":[78],"best":[80,128,186],"adder":[81,129],"configuration.":[82,130],"We":[83,103,116,131],"introduce":[84],"metric":[86,124],"known":[87],"as":[88,122],"Figure":[89],"Merit":[91],"(FOM)":[92],"quantify":[94],"performance":[97],"and":[98,190],"design.":[102],"test":[104],"DSE":[106],"by":[108],"running":[109],"set":[111],"74":[113],"configurations.":[115],"demonstrate":[117],"use":[119],"FOM":[121],"choose":[126],"observe":[132],"that":[133,204],"can":[135,176],"obtain":[136],"area-optimized":[138],"with":[140,155,196],"9.7%":[142],"reduction":[143],"in":[144,172],"resource":[145],"usage":[146],"only":[151],"0.3%":[152],"accuracy,":[153],"but":[154],"lower":[157],"bit":[158,167],"precision":[159],"(8-bit":[160],"instead":[161],"32-bits).":[163],"Further,":[164],"low":[166],"precisions,":[168],"slight":[170],"compromise":[171],"area":[174],"(0.35%)":[175],"help":[177],"improve":[178],"dramatically":[181],"(17.7%).":[182],"To":[183],"achieve":[184,211],"trade-off":[187],"between":[188],"resources,":[191],"propose":[193],"2":[197],"3":[199],"sub-adders.":[200],"Lastly,":[201],"note":[203],"performance-optimized":[206],"is":[208],"difficult":[209],"higher":[213],"bit-precision.":[214]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
