{"id":"https://openalex.org/W4283695399","doi":"https://doi.org/10.1109/isqed54688.2022.9806262","title":"Design Methodology for Scalable 2.5D/3D Heterogenous Tiled Chiplet Systems","display_name":"Design Methodology for Scalable 2.5D/3D Heterogenous Tiled Chiplet Systems","publication_year":2022,"publication_date":"2022-04-06","ids":{"openalex":"https://openalex.org/W4283695399","doi":"https://doi.org/10.1109/isqed54688.2022.9806262"},"language":"en","primary_location":{"id":"doi:10.1109/isqed54688.2022.9806262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed54688.2022.9806262","pdf_url":null,"source":{"id":"https://openalex.org/S4363607671","display_name":"2022 23rd International Symposium on Quality Electronic Design (ISQED)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 23rd International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066731099","display_name":"Srivatsa Srinivasa","orcid":"https://orcid.org/0000-0002-3146-6642"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Srivatsa Rangachar Srinivasa","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002218686","display_name":"Jainaveen Sundaram Priya","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jainaveen Sundaram Priya","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080985621","display_name":"Dileep Kurian","orcid":"https://orcid.org/0009-0000-9348-8348"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dileep Kurian","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035682639","display_name":"Erika Ramirez Lozano","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Erika Ramirez Lozano","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024748519","display_name":"Satish Yada","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Satish Yada","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006942954","display_name":"Saransh Chhabra","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saransh Chhabra","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078080034","display_name":"Kamakhya Prasad Sahu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kamakhya Prasad Sahu","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043332479","display_name":"Paolo Aseron","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paolo Aseron","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052273691","display_name":"Ronald Kalim","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ronald Kalim","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013164342","display_name":"Anuradha Srinivasan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anuradha Srinivasan","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016416631","display_name":"Tanay Karnik","orcid":"https://orcid.org/0000-0003-0072-1492"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tanay Karnik","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA","Intel Corporation, Hillsboro, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Hillsboro, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.9137,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.85496034,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7761727571487427},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7419472336769104},{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.7044284343719482},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6326680779457092},{"id":"https://openalex.org/keywords/reusability","display_name":"Reusability","score":0.6141804456710815},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5546358227729797},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5210713148117065},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5094652771949768},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4714806079864502},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4214513897895813},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2830614447593689},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.27878934144973755},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.23970133066177368}],"concepts":[{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7761727571487427},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7419472336769104},{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.7044284343719482},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6326680779457092},{"id":"https://openalex.org/C137981799","wikidata":"https://www.wikidata.org/wiki/Q1369184","display_name":"Reusability","level":3,"score":0.6141804456710815},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5546358227729797},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5210713148117065},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5094652771949768},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4714806079864502},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4214513897895813},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2830614447593689},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.27878934144973755},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.23970133066177368},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed54688.2022.9806262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed54688.2022.9806262","pdf_url":null,"source":{"id":"https://openalex.org/S4363607671","display_name":"2022 23rd International Symposium on Quality Electronic Design (ISQED)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 23rd International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2518432791","https://openalex.org/W2929880560","https://openalex.org/W3005962614","https://openalex.org/W3015587302","https://openalex.org/W3018363946","https://openalex.org/W3161519665"],"related_works":["https://openalex.org/W4282938614","https://openalex.org/W2037416628","https://openalex.org/W2073725000","https://openalex.org/W2789752821","https://openalex.org/W2205502757","https://openalex.org/W1480508001","https://openalex.org/W2235483886","https://openalex.org/W2765822612","https://openalex.org/W2528892790","https://openalex.org/W2117988687"],"abstract_inverted_index":{"The":[0],"incentives":[1],"for":[2],"chiplet":[3,84],"based":[4],"systems":[5,49],"have":[6],"been":[7],"multifold":[8],"with":[9,54],"current":[10],"workloads,":[11],"heterogeneous":[12],"integration,":[13],"and":[14,58,75,86],"rising":[15],"cost":[16],"of":[17,70,83],"technology":[18,56],"downscaling.":[19],"This":[20],"process":[21],"is":[22],"commonly":[23],"known":[24],"as":[25],"die":[26,91],"disaggregation":[27],"where":[28],"multiple":[29],"functional":[30,72],"chiplets":[31,53],"are":[32],"integrated":[33],"on":[34],"an":[35],"interposer":[36,74],"to":[37,50],"form":[38],"a":[39],"bigger":[40],"complex":[41],"system.":[42],"Current":[43],"application":[44],"trends":[45],"demand":[46],"these":[47],"tiled":[48],"support":[51],"co-existing":[52],"different":[55,59],"nodes":[57],"inter-die-interconnect":[60],"requirements.":[61],"In":[62],"this":[63],"paper,":[64],"we":[65],"describe":[66,80],"the":[67,81],"methodology":[68],"aspects":[69],"co-designing":[71],"chiplets,":[73],"package":[76],"level":[77],"interconnects.":[78],"We":[79],"advantages":[82],"reusability":[85],"establishing":[87],"high":[88],"throughput":[89],"inter":[90],"connectivity.":[92]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
