{"id":"https://openalex.org/W3161018525","doi":"https://doi.org/10.1109/isqed51717.2021.9424341","title":"Variation Aware Timing Model of CMOS Inverter for an Efficient ECSM Characterization","display_name":"Variation Aware Timing Model of CMOS Inverter for an Efficient ECSM Characterization","publication_year":2021,"publication_date":"2021-04-07","ids":{"openalex":"https://openalex.org/W3161018525","doi":"https://doi.org/10.1109/isqed51717.2021.9424341","mag":"3161018525"},"language":"en","primary_location":{"id":"doi:10.1109/isqed51717.2021.9424341","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed51717.2021.9424341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 22nd International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007706346","display_name":"Lomash Chandra Acharya","orcid":"https://orcid.org/0000-0002-6444-8483"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Lomash Chandra Acharya","raw_affiliation_strings":["Indian Institute of Technology, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100732194","display_name":"Arvind Sharma","orcid":"https://orcid.org/0000-0002-9250-9642"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arvind kumar Sharma","raw_affiliation_strings":["University of Minnesota, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036186366","display_name":"Venkatraman Ramakrishan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Venkatraman Ramakrishan","raw_affiliation_strings":["Texas Instrument, Bengaluru, India"],"affiliations":[{"raw_affiliation_string":"Texas Instrument, Bengaluru, India","institution_ids":["https://openalex.org/I4210109535"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007583032","display_name":"Ajoy Mandal","orcid":"https://orcid.org/0000-0002-9566-2474"},"institutions":[{"id":"https://openalex.org/I4210109535","display_name":"Texas Instruments (India)","ror":"https://ror.org/01t305n31","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210109535","https://openalex.org/I74760111"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ajoy Mandal","raw_affiliation_strings":["Texas Instrument, Bengaluru, India"],"affiliations":[{"raw_affiliation_string":"Texas Instrument, Bengaluru, India","institution_ids":["https://openalex.org/I4210109535"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064560509","display_name":"Sudeb Dasgupta","orcid":"https://orcid.org/0000-0002-4044-1594"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sudeb Dasgupta","raw_affiliation_strings":["Indian Institute of Technology, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031850929","display_name":"Anand Bulusu","orcid":"https://orcid.org/0000-0002-3986-3730"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anand Bulusu","raw_affiliation_strings":["Indian Institute of Technology, Roorkee, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Roorkee, India","institution_ids":["https://openalex.org/I154851008"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5007706346"],"corresponding_institution_ids":["https://openalex.org/I154851008"],"apc_list":null,"apc_paid":null,"fwci":0.8022,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.71200813,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"251","last_page":"256"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7438527345657349},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5701985955238342},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5124938488006592},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4847969114780426},{"id":"https://openalex.org/keywords/characterization","display_name":"Characterization (materials science)","score":0.4688713848590851},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3681175112724304},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34369638562202454},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3076269030570984},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2828931212425232},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21541795134544373},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19984078407287598},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11227366328239441}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7438527345657349},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5701985955238342},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5124938488006592},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4847969114780426},{"id":"https://openalex.org/C2780841128","wikidata":"https://www.wikidata.org/wiki/Q5073781","display_name":"Characterization (materials science)","level":2,"score":0.4688713848590851},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3681175112724304},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34369638562202454},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3076269030570984},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2828931212425232},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21541795134544373},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19984078407287598},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11227366328239441},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed51717.2021.9424341","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed51717.2021.9424341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 22nd International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2005941106","https://openalex.org/W2090379425","https://openalex.org/W2134067926","https://openalex.org/W2150934163","https://openalex.org/W2155810193","https://openalex.org/W2161300695","https://openalex.org/W2164962741","https://openalex.org/W3103339143"],"related_works":["https://openalex.org/W3107994849","https://openalex.org/W3014521742","https://openalex.org/W4247143848","https://openalex.org/W2009883749","https://openalex.org/W98453623","https://openalex.org/W2340624421","https://openalex.org/W2501578203","https://openalex.org/W2113108952","https://openalex.org/W98108296","https://openalex.org/W2757604236"],"abstract_inverted_index":{"In":[0,113],"static":[1],"timing":[2,118,147],"analysis":[3,221],"(STA),":[4],"delay":[5,121],"estimation":[6,122],"of":[7,27,32,42,63,74,107,123,143,152,183],"CMOS":[8,124,153],"standard":[9],"cells":[10],"is":[11,67,77,111,130],"accomplished":[12,157],"by":[13],"the":[14,25,40,71,149],"effective":[15],"current":[16],"source":[17],"model":[18,119,133,168],"(ECSM)":[19],"characterization":[20,23,110,151],"method.":[21],"ECSM":[22,150],"stores":[24],"values":[26],"threshold":[28,194],"crossing":[29],"points":[30],"(TCP's)":[31],"output":[33],"voltage":[34,188,195],"in":[35,109,214],"a":[36,78,104,140],"look-up":[37,72],"table":[38],"for":[39,120],"combination":[41],"input":[43],"transition":[44],"time":[45],"(T":[46],"<sub":[47,55,190,197],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[48,56,191,198],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">R</sub>":[49],")":[50],"and":[51,93,201,219],"load":[52],"capacitance":[53],"(C":[54],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">L</sub>":[57],").":[58],"Due":[59,81],"to":[60,69,82,164,216],"variability,":[61],"re-characterization":[62,208],"entire":[64],"cell":[65],"library":[66],"required":[68],"update":[70],"tables":[73],"TCP's,":[75],"which":[76],"tedious":[79],"task.":[80],"temporal":[83],"variability":[84,220],"mechanisms":[85],"such":[86,176],"as":[87,177],"negative":[88],"bias":[89],"temperature":[90],"instability":[91],"(NBTI)":[92],"hot":[94],"carrier":[95],"injection":[96],"(HCI),":[97],"non-critical":[98],"paths":[99],"may":[100],"become":[101],"critical.":[102],"Therefore,":[103],"large":[105,127],"coverage":[106,129],"TRs":[108],"required.":[112],"this":[114,146,206],"work,":[115],"an":[116],"analytical":[117],"inverter":[125,154],"with":[126,136,139,158,172,205],"TR":[128],"proposed.":[131],"This":[132],"matches":[134],"well":[135],"HSPICE":[137,161],"simulation":[138],"maximum":[141],"error":[142],"3%.":[144],"With":[145],"model,":[148,207],"can":[155,210],"be":[156,211,223],"very":[159],"few":[160],"simulations":[162],"compared":[163],"traditional":[165],"approaches.":[166],"The":[167],"coefficients":[169],"are":[170],"correlated":[171],"device/layout":[173],"level":[174],"parameters":[175],"driving":[178],"strength":[179],"(W)":[180],"or":[181],"number":[182],"layout":[184],"fingers":[185],"(NF),":[186],"supply":[187],"(V":[189,196],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">dd</sub>":[192],"),":[193,200],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">th</sub>":[199],"mobility":[202],"(u).":[203],"Furthermore,":[204],"efforts":[209],"reduced":[212],"significantly":[213],"comparison":[215],"conventional":[217],"approach":[218],"could":[222],"done":[224],"without":[225],"exercising":[226],"Monte-Carlo":[227],"analysis.":[228]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}