{"id":"https://openalex.org/W2611683740","doi":"https://doi.org/10.1109/isqed.2017.7918345","title":"Workload-aware ASIC flow for lifetime improvement of multi-core IoT processors","display_name":"Workload-aware ASIC flow for lifetime improvement of multi-core IoT processors","publication_year":2017,"publication_date":"2017-03-01","ids":{"openalex":"https://openalex.org/W2611683740","doi":"https://doi.org/10.1109/isqed.2017.7918345","mag":"2611683740"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2017.7918345","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2017.7918345","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 18th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024139796","display_name":"Scott Lerner","orcid":"https://orcid.org/0000-0002-6292-7069"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Scott Lerner","raw_affiliation_strings":["Drexel University, VLSI and Architecture Laboratory"],"affiliations":[{"raw_affiliation_string":"Drexel University, VLSI and Architecture Laboratory","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081080799","display_name":"Bar\u0131\u015f Ta\u015fk\u0131n","orcid":"https://orcid.org/0000-0002-7631-5696"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Baris Taskin","raw_affiliation_strings":["Drexel University, VLSI and Architecture Laboratory"],"affiliations":[{"raw_affiliation_string":"Drexel University, VLSI and Architecture Laboratory","institution_ids":["https://openalex.org/I72816309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5024139796"],"corresponding_institution_ids":["https://openalex.org/I72816309"],"apc_list":null,"apc_paid":null,"fwci":1.0284,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.77463291,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":"39","issue":null,"first_page":"379","last_page":"384"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7763385772705078},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7365660667419434},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.6258701086044312},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6144755482673645},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6112834215164185},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.561471700668335},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5150144100189209},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.32784798741340637},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16885656118392944},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.14076128602027893}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7763385772705078},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7365660667419434},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.6258701086044312},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6144755482673645},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6112834215164185},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.561471700668335},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5150144100189209},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.32784798741340637},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16885656118392944},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.14076128602027893},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2017.7918345","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2017.7918345","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 18th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1991837639","https://openalex.org/W2005456951","https://openalex.org/W2076372184","https://openalex.org/W2099679924","https://openalex.org/W2102729267","https://openalex.org/W2125381034","https://openalex.org/W2129181227","https://openalex.org/W2133079932","https://openalex.org/W2147657366","https://openalex.org/W2156064231","https://openalex.org/W2164178706","https://openalex.org/W2333603443","https://openalex.org/W2416799949","https://openalex.org/W2545401637","https://openalex.org/W4233474994","https://openalex.org/W4236432903"],"related_works":["https://openalex.org/W2070693700","https://openalex.org/W2097839191","https://openalex.org/W2132107645","https://openalex.org/W3200538824","https://openalex.org/W2505126014","https://openalex.org/W2014496217","https://openalex.org/W3007361144","https://openalex.org/W4231098049","https://openalex.org/W2362210492","https://openalex.org/W2144630005"],"abstract_inverted_index":{"Next-generation,":[0],"multi-core":[1,30,68,93],"Internet":[2],"of":[3,84,109,138,217,225],"Things":[4],"(IoT)":[5],"processors":[6,31],"use":[7],"advanced":[8],"technology":[9],"nodes":[10],"that":[11],"have":[12,213],"increased":[13],"reliability":[14,25,188,215,223],"issues":[15,189],"such":[16,190],"as":[17,191],"Negative":[18],"Bias":[19],"Temperature":[20],"Instability":[21],"(NBTI).":[22],"Run-time":[23],"feedback":[24],"mechanisms":[26],"used":[27,57,175],"on":[28,201],"current":[29],"incur":[32],"too":[33],"much":[34],"area":[35],"and":[36,106,144,162],"power":[37],"overhead":[38],"leading":[39,219],"to":[40,60,128,212,220],"limited":[41],"design":[42,51,94,169,180],"space":[43],"for":[44,67,91,149,182],"IoT":[45,150],"applications.":[46,151],"In":[47],"the":[48,62,71,104,177,187],"typical":[49,72],"ASIC":[50,69,179],"flow,":[52],"switching":[53,73,89,131,153],"activity":[54,74,90,132,154],"files":[55,75,155],"are":[56,156,196],"in":[58,134,176],"order":[59,108],"model":[61],"reliability-driven":[63],"performance":[64,142],"loss.":[65],"However,":[66],"design,":[70],"lack":[76],"multi-threaded":[77,110,130],"software":[78],"workload":[79,160,172],"information":[80],"thus":[81],"lacking":[82],"representation":[83],"modern":[85],"workloads.":[86,122],"The":[87,206],"exact":[88],"a":[92,99,126,135,141,145,159,214,221],"can":[95],"be":[96],"established":[97],"using":[98,140,198],"logic":[100,146],"simulator,":[101],"which":[102],"captures":[103],"scheduling":[105],"execution":[107],"workloads":[111,200],"but":[112],"suffer":[113],"from":[114],"long":[115],"run":[116],"times":[117],"when":[118],"dealing":[119],"with":[120,168],"real":[121,199],"This":[123,171],"paper":[124],"proposes":[125],"method":[127],"obtain":[129],"signatures":[133],"short":[136],"period":[137],"time":[139,224],"(gem5)":[143],"simulator":[147],"(VCS)":[148],"These":[152],"compiled":[157],"into":[158],"signature":[161,173],"through":[163],"this":[164],"work,":[165],"maintain":[166],"compatibility":[167],"tools.":[170],"is":[174,210],"standard":[178],"flow":[181],"lifetime":[183],"improvement":[184],"by":[185],"mitigating":[186],"NBTI":[192],"at":[193],"design-time.":[194],"Experiments":[195],"performed":[197],"an":[202],"OpenSPARC":[203],"T1":[204,208],"core.":[205],"default-sized":[207],"core":[209],"improved":[211],"increase":[216],"4.1\u00d7,":[218],"desired":[222],"10":[226],"years.":[227]},"counts_by_year":[{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}