{"id":"https://openalex.org/W2400748678","doi":"https://doi.org/10.1109/isqed.2016.7479211","title":"An efficient timing analysis model for 6T FinFET SRAM using current-based method","display_name":"An efficient timing analysis model for 6T FinFET SRAM using current-based method","publication_year":2016,"publication_date":"2016-03-01","ids":{"openalex":"https://openalex.org/W2400748678","doi":"https://doi.org/10.1109/isqed.2016.7479211","mag":"2400748678"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2016.7479211","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2016.7479211","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 17th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069335234","display_name":"Tiansong Cui","orcid":"https://orcid.org/0000-0002-4195-8181"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tiansong Cui","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100645529","display_name":"Ji Li","orcid":"https://orcid.org/0000-0002-8372-1297"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ji Li","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078801359","display_name":"Alireza Shafaei","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alireza Shafaei","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065681916","display_name":"Shahin Nazarian","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shahin Nazarian","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044650311","display_name":"Massoud Pedram","orcid":"https://orcid.org/0000-0002-2677-7307"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Massoud Pedram","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5069335234"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":1.1026,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.79876337,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"91","issue":null,"first_page":"263","last_page":"268"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6983630061149597},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.6751836538314819},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6575807332992554},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6373562216758728},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6325386762619019},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5938979387283325},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5181490182876587},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.49871182441711426},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.4969654381275177},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.47616976499557495},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4526765048503876},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.44781234860420227},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.44124385714530945},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.250618040561676},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18280774354934692}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6983630061149597},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.6751836538314819},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6575807332992554},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6373562216758728},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6325386762619019},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5938979387283325},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5181490182876587},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.49871182441711426},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.4969654381275177},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.47616976499557495},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4526765048503876},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.44781234860420227},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.44124385714530945},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.250618040561676},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18280774354934692},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2016.7479211","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2016.7479211","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 17th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1037871466","https://openalex.org/W1489111899","https://openalex.org/W1547254974","https://openalex.org/W1993743221","https://openalex.org/W1998798369","https://openalex.org/W1998949326","https://openalex.org/W2035020547","https://openalex.org/W2053853976","https://openalex.org/W2054791832","https://openalex.org/W2070862897","https://openalex.org/W2073818373","https://openalex.org/W2080326481","https://openalex.org/W2087345965","https://openalex.org/W2098286658","https://openalex.org/W2111050400","https://openalex.org/W2114252285","https://openalex.org/W2131905059","https://openalex.org/W2133268384","https://openalex.org/W2133970570","https://openalex.org/W2135407913","https://openalex.org/W2139164425","https://openalex.org/W2142659896","https://openalex.org/W2142796540","https://openalex.org/W2145765216","https://openalex.org/W2163262735","https://openalex.org/W2544630804","https://openalex.org/W3145228709","https://openalex.org/W6641884055","https://openalex.org/W6681287237","https://openalex.org/W6729310338"],"related_works":["https://openalex.org/W4392590355","https://openalex.org/W1974895211","https://openalex.org/W3151633427","https://openalex.org/W2176409448","https://openalex.org/W2212894501","https://openalex.org/W2031402563","https://openalex.org/W2751669468","https://openalex.org/W2132750868","https://openalex.org/W4246714407","https://openalex.org/W2126022271"],"abstract_inverted_index":{"Accurate":[0],"timing":[1,120],"analysis":[2],"is":[3,32,57],"a":[4],"critical":[5],"step":[6],"in":[7,25,119],"the":[8,21,61,67,86,126],"design":[9],"of":[10,23,70,128],"VLSI":[11],"circuits.":[12],"In":[13,48,83],"addition,":[14],"nanoscale":[15],"FinFET":[16,72],"devices":[17],"are":[18,96],"emerging":[19],"as":[20,64,66],"transistor":[22],"choice":[24],"32nm":[26],"CMOS":[27],"technologies":[28],"and":[29,44,90,104],"beyond.":[30],"This":[31],"due":[33],"to":[34,59,98],"their":[35],"more":[36],"effective":[37],"channel":[38],"control,":[39],"higher":[40],"ON/OFF":[41],"current":[42],"ratios,":[43],"lower":[45],"energy":[46],"consumption.":[47],"this":[49,84],"paper,":[50],"an":[51],"efficient":[52],"Current":[53],"Source":[54],"Model":[55],"(CSM)":[56],"presented":[58],"calculate":[60],"output":[62],"waveform":[63,78],"well":[65],"read/write":[68],"delay":[69],"6T":[71],"SRAM":[73],"cells":[74],"accounting":[75],"for":[76],"noisy":[77],"at":[79],"each":[80],"voltage":[81,130],"node.":[82],"model,":[85],"non-linear":[87],"analytical":[88],"methods":[89],"low-dimensional":[91],"CSM":[92],"lookup":[93],"tables":[94],"(LUTs)":[95],"combined":[97],"simultaneously":[99],"achieve":[100],"high":[101],"modeling":[102],"accuracy":[103],"time/space":[105],"efficiency.":[106],"Experimental":[107],"data":[108],"shows":[109],"that":[110],"our":[111],"proposed":[112],"framework":[113],"not":[114],"only":[115],"provides":[116],"accurate":[117],"results":[118],"analysis,":[121],"but":[122],"also":[123],"can":[124],"capture":[125],"effect":[127],"arbitrary":[129],"noise.":[131]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}