{"id":"https://openalex.org/W2400148010","doi":"https://doi.org/10.1109/isqed.2016.7479207","title":"Preventing design reverse engineering with reconfigurable spin transfer torque LUT gates","display_name":"Preventing design reverse engineering with reconfigurable spin transfer torque LUT gates","publication_year":2016,"publication_date":"2016-03-01","ids":{"openalex":"https://openalex.org/W2400148010","doi":"https://doi.org/10.1109/isqed.2016.7479207","mag":"2400148010"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2016.7479207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2016.7479207","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 17th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069787144","display_name":"Theodore Winograd","orcid":null},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Theodore Winograd","raw_affiliation_strings":["George Mason University"],"affiliations":[{"raw_affiliation_string":"George Mason University","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008087855","display_name":"Hassan Salmani","orcid":"https://orcid.org/0000-0002-4863-2934"},"institutions":[{"id":"https://openalex.org/I137853757","display_name":"Howard University","ror":"https://ror.org/05gt1vc06","country_code":"US","type":"education","lineage":["https://openalex.org/I137853757"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hassan Salmani","raw_affiliation_strings":["Howard University"],"affiliations":[{"raw_affiliation_string":"Howard University","institution_ids":["https://openalex.org/I137853757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066983905","display_name":"Hamid Mahmoodi","orcid":"https://orcid.org/0000-0003-4237-3086"},"institutions":[{"id":"https://openalex.org/I71838634","display_name":"San Francisco State University","ror":"https://ror.org/05ykr0121","country_code":"US","type":"education","lineage":["https://openalex.org/I71838634"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hamid Mahmoodi","raw_affiliation_strings":["Francisco State University"],"affiliations":[{"raw_affiliation_string":"Francisco State University","institution_ids":["https://openalex.org/I71838634"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047382437","display_name":"Houman Homayoun","orcid":"https://orcid.org/0000-0001-8904-4699"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Houman Homayoun","raw_affiliation_strings":["George Mason University"],"affiliations":[{"raw_affiliation_string":"George Mason University","institution_ids":["https://openalex.org/I162714631"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5069787144"],"corresponding_institution_ids":["https://openalex.org/I162714631"],"apc_list":null,"apc_paid":null,"fwci":0.86773991,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.74861687,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"57","issue":null,"first_page":"242","last_page":"247"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spin-transfer-torque","display_name":"Spin-transfer torque","score":0.7601140737533569},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.659146785736084},{"id":"https://openalex.org/keywords/torque","display_name":"Torque","score":0.6108194589614868},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6057568788528442},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5649610161781311},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5293755531311035},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5026748180389404},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.47143498063087463},{"id":"https://openalex.org/keywords/rendering","display_name":"Rendering (computer graphics)","score":0.4694499671459198},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.4662087857723236},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.44975748658180237},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44675540924072266},{"id":"https://openalex.org/keywords/hardware-security-module","display_name":"Hardware security module","score":0.4413520097732544},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4390186369419098},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3739053010940552},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3222638964653015},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2574692666530609},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.12173348665237427}],"concepts":[{"id":"https://openalex.org/C609986","wikidata":"https://www.wikidata.org/wiki/Q844840","display_name":"Spin-transfer torque","level":4,"score":0.7601140737533569},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.659146785736084},{"id":"https://openalex.org/C144171764","wikidata":"https://www.wikidata.org/wiki/Q48103","display_name":"Torque","level":2,"score":0.6108194589614868},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6057568788528442},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5649610161781311},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5293755531311035},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5026748180389404},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.47143498063087463},{"id":"https://openalex.org/C205711294","wikidata":"https://www.wikidata.org/wiki/Q176953","display_name":"Rendering (computer graphics)","level":2,"score":0.4694499671459198},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.4662087857723236},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.44975748658180237},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44675540924072266},{"id":"https://openalex.org/C39217717","wikidata":"https://www.wikidata.org/wiki/Q1432354","display_name":"Hardware security module","level":3,"score":0.4413520097732544},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4390186369419098},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3739053010940552},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3222638964653015},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2574692666530609},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.12173348665237427},{"id":"https://openalex.org/C115260700","wikidata":"https://www.wikidata.org/wiki/Q11408","display_name":"Magnetic field","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0},{"id":"https://openalex.org/C32546565","wikidata":"https://www.wikidata.org/wiki/Q856711","display_name":"Magnetization","level":3,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2016.7479207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2016.7479207","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 17th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.41999998688697815,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1535718607","https://openalex.org/W1968462272","https://openalex.org/W2005522813","https://openalex.org/W2013984675","https://openalex.org/W2020261724","https://openalex.org/W2031539925","https://openalex.org/W2033381896","https://openalex.org/W2035650583","https://openalex.org/W2063615695","https://openalex.org/W2075795621","https://openalex.org/W2101901689","https://openalex.org/W2111705720","https://openalex.org/W2116320487","https://openalex.org/W2136316949","https://openalex.org/W2141762303","https://openalex.org/W2154648000","https://openalex.org/W2155551886","https://openalex.org/W2170526008","https://openalex.org/W2186843572","https://openalex.org/W2442112158","https://openalex.org/W4246809981","https://openalex.org/W4252994642","https://openalex.org/W6677336575"],"related_works":["https://openalex.org/W2550053401","https://openalex.org/W2805075728","https://openalex.org/W4253195573","https://openalex.org/W2020934033","https://openalex.org/W2612718941","https://openalex.org/W2755565482","https://openalex.org/W63276784","https://openalex.org/W2059530328","https://openalex.org/W3011978806","https://openalex.org/W2156446048"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,28],"rigorous":[4],"step":[5],"towards":[6],"design-for-assurance":[7],"by":[8],"employing":[9],"the":[10,37,58],"non-volatile":[11],"spin":[12],"transfer":[13],"torque":[14],"magnetic":[15],"technology":[16],"to":[17],"design":[18,33,51,69],"reconfigurable":[19],"Look-Up-Tables":[20],"logic":[21],"components":[22],"(NV-STT-based":[23],"LUTs).":[24],"Further,":[25],"we":[26],"introduce":[27],"novel":[29],"security-driven":[30],"STT-CMOS":[31],"hybrid":[32],"flow":[34,59],"that":[35,61],"ensures":[36,60],"functionality":[38],"of":[39],"NV-STT-based":[40],"LUTs":[41],"cannot":[42],"be":[43],"determined":[44],"in":[45],"any":[46,50],"manageable":[47],"time,":[48],"rendering":[49],"reverse":[52],"engineering":[53],"attack":[54],"ineffective.":[55],"In":[56],"addition,":[57],"there":[62],"is":[63],"minimum":[64],"or":[65],"no":[66],"impact":[67],"on":[68],"parametric":[70],"constraints":[71],"including":[72],"performance,":[73],"power":[74],"and":[75],"area.":[76]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
