{"id":"https://openalex.org/W2398782309","doi":"https://doi.org/10.1109/isqed.2016.7479201","title":"Low-leakage and process-variation-tolerant write-read disturb-free 9T SRAM cell using CMOS and FinFETs","display_name":"Low-leakage and process-variation-tolerant write-read disturb-free 9T SRAM cell using CMOS and FinFETs","publication_year":2016,"publication_date":"2016-03-01","ids":{"openalex":"https://openalex.org/W2398782309","doi":"https://doi.org/10.1109/isqed.2016.7479201","mag":"2398782309"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2016.7479201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2016.7479201","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 17th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101029752","display_name":"Ayushparth Sharma","orcid":null},"institutions":[{"id":"https://openalex.org/I33552525","display_name":"LNM Institute of Information Technology","ror":"https://ror.org/03jp7rg16","country_code":"IN","type":"education","lineage":["https://openalex.org/I33552525"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Ayushparth Sharma","raw_affiliation_strings":["The LNM Institute of Information Technology, Jaipur, India"],"affiliations":[{"raw_affiliation_string":"The LNM Institute of Information Technology, Jaipur, India","institution_ids":["https://openalex.org/I33552525"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060684252","display_name":"Kusum Lata","orcid":"https://orcid.org/0000-0003-3681-2791"},"institutions":[{"id":"https://openalex.org/I33552525","display_name":"LNM Institute of Information Technology","ror":"https://ror.org/03jp7rg16","country_code":"IN","type":"education","lineage":["https://openalex.org/I33552525"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kusum Lata","raw_affiliation_strings":["The LNM Institute of Information Technology, Jaipur, India"],"affiliations":[{"raw_affiliation_string":"The LNM Institute of Information Technology, Jaipur, India","institution_ids":["https://openalex.org/I33552525"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101029752"],"corresponding_institution_ids":["https://openalex.org/I33552525"],"apc_list":null,"apc_paid":null,"fwci":0.3675,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.64338507,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"205","last_page":"210"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7592403888702393},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.72892165184021},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7101513147354126},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6482917666435242},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.587661623954773},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5788441300392151},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5196608304977417},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4884392321109772},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.45314958691596985},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.44983774423599243},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4173002541065216},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.3876742720603943},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3516486883163452},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3132781982421875},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21971383690834045},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1590845286846161},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08677941560745239}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7592403888702393},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.72892165184021},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7101513147354126},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6482917666435242},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.587661623954773},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5788441300392151},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5196608304977417},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4884392321109772},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.45314958691596985},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.44983774423599243},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4173002541065216},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.3876742720603943},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3516486883163452},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3132781982421875},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21971383690834045},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1590845286846161},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08677941560745239},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2016.7479201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2016.7479201","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 17th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W566978853","https://openalex.org/W1549072435","https://openalex.org/W1969775274","https://openalex.org/W2004965314","https://openalex.org/W2035589388","https://openalex.org/W2057899754","https://openalex.org/W2088072859","https://openalex.org/W2089731760","https://openalex.org/W2110092670","https://openalex.org/W2112265133","https://openalex.org/W2114902269","https://openalex.org/W2132621842","https://openalex.org/W2143860948","https://openalex.org/W2145536841","https://openalex.org/W2158267481","https://openalex.org/W2161954730","https://openalex.org/W2738467824","https://openalex.org/W4256319812","https://openalex.org/W6677270198","https://openalex.org/W6682981986"],"related_works":["https://openalex.org/W2297319780","https://openalex.org/W2119312496","https://openalex.org/W2178217057","https://openalex.org/W4247460323","https://openalex.org/W2537086382","https://openalex.org/W1972800815","https://openalex.org/W2118528827","https://openalex.org/W2153162275","https://openalex.org/W2775062502","https://openalex.org/W1995824314"],"abstract_inverted_index":{"For":[0],"22nm":[1,48],"SoC":[2],"products,":[3],"we":[4],"propose":[5],"a":[6],"9T":[7,55],"SRAM":[8,90,95],"cell":[9,41,56,91,132,140],"with":[10],"low":[11,15],"voltage":[12],"operation":[13,32],"and":[14,21,33,44,50,65,77,107,126],"leakage":[16,83],"power":[17,72,112],"using":[18,97],"Bulk":[19],"CMOS":[20,47,121],"FinFETs.":[22],"This":[23],"is":[24,42,141],"achieved":[25],"by":[26],"adopting":[27],"single-ended":[28],"write":[29,61,71,78],"&":[30,70],"read":[31,69,76,116],"serial":[34],"transistor":[35],"assembly":[36],"for":[37],"stacking":[38],"effect.":[39],"Proposed":[40],"designed":[43],"simulated":[45],"in":[46,60,68,111],"technology":[49],"results":[51],"shows":[52,102],"that":[53],"proposed":[54,131,139],"achieves":[57],"42.2%":[58],"improvement":[59,108],"noise":[62],"margin,":[63],"30.1%":[64],"24.7%":[66],"reduction":[67,125],"respectively,10^7":[73],"times":[74,115],"reduced":[75,82],"failure":[79],"probabilities,":[80],"31.8%":[81],"current":[84],"when":[85,149],"compared":[86,150],"to":[87,143,151],"Conventional":[88],"6T":[89,153],"design.":[92,154],"Also,":[93,138],"designing":[94],"cells":[96],"fin-shaped":[98],"field":[99],"effect":[100],"transistors":[101],"more":[103],"process":[104,136],"variation":[105],"tolerance":[106],"of":[109,130],"~23%":[110],"consumption,":[113],"2.04":[114],"SNM":[117],"at":[118],"VDD=500mV":[119],"over":[120],"design":[122],"counterpart.":[123],"Leakage":[124],"enhanced":[127],"read-write":[128],"stability":[129],"are":[133],"verified":[134],"under":[135],"variations.":[137],"observed":[142],"have":[144],"32%":[145],"larger":[146],"layout":[147],"area":[148],"Conv.":[152]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
