{"id":"https://openalex.org/W2052267761","doi":"https://doi.org/10.1109/isqed.2015.7085418","title":"Designing effective scan compression solutions for industrial circuits","display_name":"Designing effective scan compression solutions for industrial circuits","publication_year":2015,"publication_date":"2015-03-01","ids":{"openalex":"https://openalex.org/W2052267761","doi":"https://doi.org/10.1109/isqed.2015.7085418","mag":"2052267761"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2015.7085418","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2015.7085418","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Sixteenth International Symposium on Quality Electronic Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053635767","display_name":"Subramanian Chebiyam","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Subramanian Chebiyam","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc., 700 E. Middlefield Rd., Mountain View, CA, 94043, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc., 700 E. Middlefield Rd., Mountain View, CA, 94043, USA#TAB#","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041100073","display_name":"Anshuman Chandra","orcid":"https://orcid.org/0000-0002-2686-3918"},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Anshuman Chandra","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc., 700 E. Middlefield Rd., Mountain View, CA, 94043, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc., 700 E. Middlefield Rd., Mountain View, CA, 94043, USA#TAB#","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112339854","display_name":"Rohit Kapur","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I4210088951","display_name":"Synopsys (United States)","ror":"https://ror.org/013by2m91","country_code":"US","type":"company","lineage":["https://openalex.org/I4210088951"]}],"countries":["CH","US"],"is_corresponding":false,"raw_author_name":"Rohit Kapur","raw_affiliation_strings":["Synopsys, Inc., Mountain View, CA, USA","Synopsys, Inc., 700 E. Middlefield Rd., Mountain View, CA, 94043, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc., Mountain View, CA, USA","institution_ids":["https://openalex.org/I4210088951"]},{"raw_affiliation_string":"Synopsys, Inc., 700 E. Middlefield Rd., Mountain View, CA, 94043, USA#TAB#","institution_ids":["https://openalex.org/I1335490905"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2041,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.38589293,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"167","last_page":"172"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9797000288963318,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7419673204421997},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.720890998840332},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.6750196218490601},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.6667616963386536},{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.6611105799674988},{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.5380629301071167},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5295689105987549},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5127342939376831},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.47437840700149536},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4121285080909729},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38263559341430664},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3736758232116699},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3543296456336975},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34631460905075073},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33231186866760254},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2605292797088623},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.22652789950370789},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1578107476234436},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10165432095527649},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08776170015335083},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.07897794246673584}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7419673204421997},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.720890998840332},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.6750196218490601},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.6667616963386536},{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.6611105799674988},{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.5380629301071167},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5295689105987549},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5127342939376831},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.47437840700149536},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4121285080909729},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38263559341430664},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3736758232116699},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3543296456336975},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34631460905075073},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33231186866760254},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2605292797088623},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.22652789950370789},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1578107476234436},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10165432095527649},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08776170015335083},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.07897794246673584},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2015.7085418","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2015.7085418","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Sixteenth International Symposium on Quality Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5099999904632568,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1552973677","https://openalex.org/W2053311960","https://openalex.org/W2087289986","https://openalex.org/W2110267158","https://openalex.org/W2125474840","https://openalex.org/W2150895785","https://openalex.org/W4210799017"],"related_works":["https://openalex.org/W2127184179","https://openalex.org/W3088373974","https://openalex.org/W2143881398","https://openalex.org/W2160753176","https://openalex.org/W2092894550","https://openalex.org/W1970697485","https://openalex.org/W2049913894","https://openalex.org/W4230966676","https://openalex.org/W2520108610","https://openalex.org/W2111803469"],"abstract_inverted_index":{"With":[0],"chip":[1],"designs":[2],"continuously":[3],"shrinking":[4],"nodes":[5],"and":[6,70],"new":[7],"fault":[8],"models":[9],"evolving":[10],"for":[11],"lower":[12],"nodes,":[13],"scan":[14,58,75],"compression":[15,59],"based":[16],"testing":[17],"has":[18],"become":[19],"the":[20,29,38,41,56,71,79],"standard":[21],"test":[22],"methodology.":[23],"There":[24],"are":[25,81],"many":[26],"papers":[27,36],"on":[28],"implementation":[30,39,80],"of":[31,40,66,78],"Scan":[32],"Compression.":[33],"All":[34],"these":[35],"discuss":[37],"technology":[42],"in":[43],"an":[44,64,67],"idealistic":[45],"environment.":[46],"In":[47],"this":[48],"paper":[49,62],"we":[50],"present":[51],"design":[52],"issues":[53],"that":[54,73],"impact":[55,74],"overall":[57],"architecture.":[60],"This":[61],"is":[63],"example":[65],"industrial":[68],"environment":[69],"decisions":[72],"compression.":[76],"Results":[77],"presented":[82],"with":[83],"data.":[84]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
