{"id":"https://openalex.org/W2171670365","doi":"https://doi.org/10.1109/isqed.2013.6523632","title":"Performance entitlement by exploiting transistor's BTI recovery","display_name":"Performance entitlement by exploiting transistor's BTI recovery","publication_year":2013,"publication_date":"2013-03-01","ids":{"openalex":"https://openalex.org/W2171670365","doi":"https://doi.org/10.1109/isqed.2013.6523632","mag":"2171670365"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2013.6523632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2013.6523632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063823048","display_name":"S. P. Valan Arasu","orcid":null},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Arasu","raw_affiliation_strings":["Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040401289","display_name":"Mehrdad Nourani","orcid":"https://orcid.org/0000-0001-5077-4424"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Nourani","raw_affiliation_strings":["Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110251075","display_name":"V. Reddy","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Reddy","raw_affiliation_strings":["CMOS Reliability Group, Texas Instruments, Inc., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CMOS Reliability Group, Texas Instruments, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039431688","display_name":"John M. Carulli","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. M. Carulli","raw_affiliation_strings":["CMOS Reliability Group, Texas Instruments, Inc., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CMOS Reliability Group, Texas Instruments, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2002,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.82643816,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"341","last_page":"346"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.6335769891738892},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6081673502922058},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5959420204162598},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5682868957519531},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5454566478729248},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5255191326141357},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5060667395591736},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.44618552923202515},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4193251430988312},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.41016435623168945},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.357617050409317},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2829691767692566},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1887916624546051}],"concepts":[{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.6335769891738892},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6081673502922058},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5959420204162598},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5682868957519531},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5454566478729248},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5255191326141357},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5060667395591736},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.44618552923202515},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4193251430988312},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.41016435623168945},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.357617050409317},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2829691767692566},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1887916624546051},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2013.6523632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2013.6523632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1584309135","https://openalex.org/W1970620885","https://openalex.org/W2020505525","https://openalex.org/W2046094701","https://openalex.org/W2097579272","https://openalex.org/W2112542663","https://openalex.org/W2113115586","https://openalex.org/W2122520074","https://openalex.org/W2134861486","https://openalex.org/W2135748666","https://openalex.org/W2136500761","https://openalex.org/W2164178706","https://openalex.org/W2170927643","https://openalex.org/W2543567411","https://openalex.org/W3147111312","https://openalex.org/W6680137174","https://openalex.org/W6684298975","https://openalex.org/W6729157300"],"related_works":["https://openalex.org/W4289538008","https://openalex.org/W3186427148","https://openalex.org/W2138282914","https://openalex.org/W2065850627","https://openalex.org/W2017012638","https://openalex.org/W2071885361","https://openalex.org/W1966793535","https://openalex.org/W1964447062","https://openalex.org/W2088265144","https://openalex.org/W2386641302"],"abstract_inverted_index":{"The":[0,67],"inherent":[1],"problem":[2],"in":[3,102],"signal":[4],"probability":[5],"(\u03b1)":[6],"prediction":[7],"has":[8],"limited":[9],"the":[10,14,50,103],"scope":[11],"of":[12,36,106],"exploiting":[13],"transistor's":[15],"BTI":[16,51],"recovery":[17,59],"at":[18,64],"circuit":[19,65],"level.":[20,66],"In":[21],"this":[22],"paper,":[23],"we":[24],"present":[25],"a":[26,44,57,93,98],"design-for-reliability":[27],"(DFR)":[28],"methodology":[29],"for":[30],"digital":[31],"designs,":[32],"BTI_Refresh,":[33],"that":[34,49,91],"instead":[35],"relying":[37],"on":[38,83],"predicting":[39],"\u03b1,":[40],"sets":[41],"it":[42],"to":[43,73,112],"known":[45],"value":[46],"(~0.5)":[47],"such":[48],"stress":[52],"effects":[53],"are":[54],"alleviated":[55],"and":[56,76],"predicted":[58],"effect":[60],"could":[61],"be":[62,70],"guaranteed":[63],"technique":[68],"can":[69],"applied":[71],"equally":[72],"both":[74],"NBTI":[75],"PBTI.":[77],"Experimental":[78],"results":[79],"using":[80],"Cadence":[81],"Relxpert":[82],"critical":[84,107],"paths":[85],"extracted":[86],"from":[87],"industry":[88],"designs":[89],"show":[90],"with":[92,110],"negligible":[94],"power,":[95],"area":[96],"overhead,":[97],"significant":[99],"improvement":[100],"(50%)":[101],"total":[104],"degradation":[105],"path":[108],"performance":[109],"respect":[111],"end-of-life":[113],"models":[114],"is":[115],"achievable.":[116]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
