{"id":"https://openalex.org/W1981423095","doi":"https://doi.org/10.1109/isqed.2012.6187478","title":"A preliminary study on system-level impact of persistent main memory","display_name":"A preliminary study on system-level impact of persistent main memory","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W1981423095","doi":"https://doi.org/10.1109/isqed.2012.6187478","mag":"1981423095"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2012.6187478","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2012.6187478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Thirteenth International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hdl.handle.net/10923/23220","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020941021","display_name":"Taciano Perez","orcid":"https://orcid.org/0000-0002-5256-0769"},"institutions":[{"id":"https://openalex.org/I1324840837","display_name":"Hewlett-Packard (United States)","ror":"https://ror.org/059rn9488","country_code":"US","type":"company","lineage":["https://openalex.org/I1324840837"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Taciano Perez","raw_affiliation_strings":["Hewlett-Packard Research and Development, Porto Alegre, Brazil","Hewlett-Packard R&D, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Hewlett-Packard Research and Development, Porto Alegre, Brazil","institution_ids":[]},{"raw_affiliation_string":"Hewlett-Packard R&D, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I1324840837"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072149252","display_name":"Ney Calazans","orcid":"https://orcid.org/0000-0002-0467-4294"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ney Laert Vilar Calazans","raw_affiliation_strings":["Faculty of Informatics, PUCRS, Porto Alegre, Brazil","PUCRS Faculty of Informatics Porto Alegre Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Informatics, PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"PUCRS Faculty of Informatics Porto Alegre Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071130875","display_name":"C\u00e9sar A. F. De Rose","orcid":"https://orcid.org/0000-0003-0070-0157"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Cesar A. F. De Rose","raw_affiliation_strings":["Faculty of Informatics, PUCRS, Porto Alegre, Brazil","PUCRS Faculty of Informatics Porto Alegre Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Informatics, PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"PUCRS Faculty of Informatics Porto Alegre Brazil","institution_ids":["https://openalex.org/I45643870"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5020941021"],"corresponding_institution_ids":["https://openalex.org/I1324840837"],"apc_list":null,"apc_paid":null,"fwci":1.2449,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80794608,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"4","issue":null,"first_page":"84","last_page":"90"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.7403798699378967},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6926068663597107},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.612369179725647},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.5772386789321899},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5594888925552368},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5562105178833008},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5509466528892517},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5502082705497742},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.5480260848999023},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.5256165862083435},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5018110275268555},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.4997713565826416},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.4748944342136383},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.4436373710632324},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.42214030027389526},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.41916030645370483},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38679420948028564},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.34659141302108765},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.130843847990036},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1274183690547943}],"concepts":[{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.7403798699378967},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6926068663597107},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.612369179725647},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.5772386789321899},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5594888925552368},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5562105178833008},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5509466528892517},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5502082705497742},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.5480260848999023},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.5256165862083435},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5018110275268555},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.4997713565826416},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.4748944342136383},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.4436373710632324},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.42214030027389526},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.41916030645370483},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38679420948028564},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.34659141302108765},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.130843847990036},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1274183690547943}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isqed.2012.6187478","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2012.6187478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Thirteenth International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},{"id":"pmh:oai:repositorio.pucrs.br:10923/23220","is_oa":true,"landing_page_url":"https://hdl.handle.net/10923/23220","pdf_url":null,"source":{"id":"https://openalex.org/S4377196369","display_name":"PUCRS Repository (Pontifical Catholic University of Rio Grande do Sul)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45643870","host_organization_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","host_organization_lineage":["https://openalex.org/I45643870"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-sa","license_id":"https://openalex.org/licenses/cc-by-nc-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"conferenceObject"}],"best_oa_location":{"id":"pmh:oai:repositorio.pucrs.br:10923/23220","is_oa":true,"landing_page_url":"https://hdl.handle.net/10923/23220","pdf_url":null,"source":{"id":"https://openalex.org/S4377196369","display_name":"PUCRS Repository (Pontifical Catholic University of Rio Grande do Sul)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45643870","host_organization_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","host_organization_lineage":["https://openalex.org/I45643870"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-sa","license_id":"https://openalex.org/licenses/cc-by-nc-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"conferenceObject"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W1515422725","https://openalex.org/W1564523715","https://openalex.org/W1987201308","https://openalex.org/W2004806949","https://openalex.org/W2006798699","https://openalex.org/W2013055927","https://openalex.org/W2025516544","https://openalex.org/W2028802049","https://openalex.org/W2048588974","https://openalex.org/W2060204338","https://openalex.org/W2064977311","https://openalex.org/W2088207049","https://openalex.org/W2096800126","https://openalex.org/W2102449048","https://openalex.org/W2112181056","https://openalex.org/W2113637091","https://openalex.org/W2120635877","https://openalex.org/W2135393827","https://openalex.org/W2144133653","https://openalex.org/W2147539449","https://openalex.org/W2148831941","https://openalex.org/W2156159026","https://openalex.org/W2157808045","https://openalex.org/W2158520123","https://openalex.org/W2159774216","https://openalex.org/W2162651880","https://openalex.org/W2163031927","https://openalex.org/W2262472396","https://openalex.org/W2338375547","https://openalex.org/W2996954354","https://openalex.org/W2998915116","https://openalex.org/W2999811406","https://openalex.org/W3203992401","https://openalex.org/W4231378725","https://openalex.org/W4313016175","https://openalex.org/W6633941944","https://openalex.org/W6682917345"],"related_works":["https://openalex.org/W4238754064","https://openalex.org/W2340699851","https://openalex.org/W2546565930","https://openalex.org/W2903040985","https://openalex.org/W2183575955","https://openalex.org/W2188534734","https://openalex.org/W2151951695","https://openalex.org/W1981423095","https://openalex.org/W2041271371","https://openalex.org/W2293894704"],"abstract_inverted_index":{"For":[0],"almost":[1],"30":[2],"years,":[3],"computer":[4,82],"memory":[5,15,38,59,70,87,102],"systems":[6],"have":[7],"been":[8],"essentially":[9],"the":[10,54,67,96],"same:":[11],"volatile,":[12],"high":[13],"speed":[14,36],"technologies":[16,61,103],"like":[17],"SRAM":[18],"and":[19,24,33,77,90,115,128],"DRAM":[20],"used":[21],"for":[22,29,39],"cache":[23],"main":[25,86,106],"memory;":[26],"magnetic":[27],"disks":[28],"high-end":[30],"data":[31],"storage;":[32],"persistent,":[34],"low":[35,42],"flash":[37],"storage":[40],"with":[41,84],"capacity/low":[43],"energy":[44,78,116],"consumption":[45],"requirements":[46],"such":[47],"as":[48,104],"embedded/mobile":[49],"devices.":[50],"Today":[51],"we":[52],"watch":[53],"emergence":[55],"of":[56,69,80,98],"new":[57],"non-volatile":[58,101],"(NVM)":[60],"that":[62,109],"promise":[63],"to":[64,122],"radically":[65],"change":[66],"landscape":[68],"systems.":[71],"This":[72],"work":[73],"presents":[74],"system-level":[75],"latency":[76],"impacts":[79],"a":[81],"architecture":[83],"persistent":[85,105],"using":[88,126,132],"PCRAM":[89,127],"Memristor.":[91,133],"Our":[92],"experimental":[93],"results":[94],"support":[95],"feasibility":[97],"employing":[99],"emerging":[100],"memory,":[107],"indicating":[108],"performance":[110],"penalties":[111],"should":[112,118],"be":[113,119],"mild,":[114],"improvements":[117],"significant,":[120],"up":[121],"45.5%":[123],"less":[124,130],"when":[125,131],"72.4%":[129]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}