{"id":"https://openalex.org/W2097820371","doi":"https://doi.org/10.1109/isqed.2011.5770818","title":"A fully pipelined implementation of Monte Carlo based SSTA on FPGAs","display_name":"A fully pipelined implementation of Monte Carlo based SSTA on FPGAs","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2097820371","doi":"https://doi.org/10.1109/isqed.2011.5770818","mag":"2097820371"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2011.5770818","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2011.5770818","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064661470","display_name":"Yuasa Hiroshi","orcid":null},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Hiroshi Yuasa","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050629932","display_name":"Hiroshi Tsutsui","orcid":"https://orcid.org/0000-0002-6280-2979"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroshi Tsutsui","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074384306","display_name":"Hiroyuki Ochi","orcid":"https://orcid.org/0000-0002-9075-6711"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Ochi","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017861176","display_name":"Takashi Sat\u014d","orcid":"https://orcid.org/0000-0002-1577-8259"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takashi Sato","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Yoshida-hon-machi, Sakyo, Kyoto, 606-8501 Japan","institution_ids":["https://openalex.org/I22299242"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5064661470"],"corresponding_institution_ids":["https://openalex.org/I22299242"],"apc_list":null,"apc_paid":null,"fwci":0.5299,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.71014403,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"3","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7462018132209778},{"id":"https://openalex.org/keywords/random-number-generation","display_name":"Random number generation","score":0.6271589994430542},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5621877908706665},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5361888408660889},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5313646793365479},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.4914942979812622},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.33532556891441345},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29854050278663635},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12304109334945679}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7462018132209778},{"id":"https://openalex.org/C201866948","wikidata":"https://www.wikidata.org/wiki/Q228206","display_name":"Random number generation","level":2,"score":0.6271589994430542},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5621877908706665},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5361888408660889},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5313646793365479},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.4914942979812622},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33532556891441345},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29854050278663635},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12304109334945679},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2011.5770818","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2011.5770818","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1961876714","https://openalex.org/W1964995055","https://openalex.org/W1996048930","https://openalex.org/W2100636574","https://openalex.org/W2103323734","https://openalex.org/W2115515513","https://openalex.org/W2120566121","https://openalex.org/W2126564504","https://openalex.org/W2128932352","https://openalex.org/W2142599304","https://openalex.org/W2146990748","https://openalex.org/W2149606342","https://openalex.org/W2153940514","https://openalex.org/W2163262735","https://openalex.org/W2171450065","https://openalex.org/W3138931910","https://openalex.org/W3141440412","https://openalex.org/W4237955880","https://openalex.org/W4249811926","https://openalex.org/W6641884055","https://openalex.org/W6675376406","https://openalex.org/W6678664461","https://openalex.org/W6682315463","https://openalex.org/W6682656038"],"related_works":["https://openalex.org/W2170314243","https://openalex.org/W2119179026","https://openalex.org/W2794947590","https://openalex.org/W2114971758","https://openalex.org/W2109932036","https://openalex.org/W2093081283","https://openalex.org/W4243305727","https://openalex.org/W2145339442","https://openalex.org/W3217774925","https://openalex.org/W2362080632"],"abstract_inverted_index":{"We":[0],"propose":[1,75],"an":[2,35,94,102],"efficient":[3],"implementation":[4,180],"of":[5,25,39,79,86,119,184],"Monte":[6],"Carlo":[7],"based":[8,145],"statistical":[9],"static":[10],"timing":[11,45,67,84],"analysis":[12,190],"(MC-SSTA)":[13],"on":[14,146],"FPGAs.":[15],"MC-SSTA,":[16,58],"which":[17,59,125,202],"repeatedly":[18],"executes":[19],"ordinary":[20],"STA":[21,107],"using":[22],"a":[23,65,76,87,105,123,135,178,186],"set":[24],"randomly":[26],"generated":[27],"gate":[28],"delay":[29,110,117,156],"samples,":[30],"is":[31,112],"widely":[32],"accepted":[33],"as":[34,64,104,114,153],"accuracy":[36,191],"reference":[37],"because":[38],"its":[40,71],"ability":[41],"to":[42,158,177,193],"handle":[43],"any":[44],"distributions":[46],"and":[47,141,167,197],"correlations.":[48],"Extremely":[49],"long":[50],"CPU":[51],"time":[52],"has":[53,213],"been":[54,214],"required":[55],"for":[56,130],"the":[57,115,131,147,154,182,194,198,204],"prevented":[60],"it":[61],"from":[62],"adopting":[63],"mainstream":[66],"analyzer.":[68],"Motivated":[69],"by":[70],"inherent":[72],"parallelism,":[73],"we":[74],"hardware":[77,160],"acceleration":[78,175],"MC-SSTA.":[80],"In":[81],"our":[82,163],"approach,":[83],"graph":[85],"target":[88],"netlist":[89],"will":[90],"be":[91,99],"translated":[92],"into":[93,101],"RTL":[95],"description":[96],"that":[97],"can":[98],"mapped":[100],"FPGA":[103],"dedicated":[106],"engine.":[108],"Each":[109],"arc":[111],"realized":[113],"random":[116,155,210],"generator":[118,157],"specified":[120],"parameters":[121],"with":[122],"register,":[124],"explores":[126],"full":[127],"pipelining":[128],"operation":[129],"logic":[132],"gates":[133],"in":[134,181],"path.":[136],"Linear":[137],"feedback":[138],"shift":[139],"registers":[140],"normal":[142,208],"distribution":[143,209],"generators":[144],"central":[148],"limit":[149],"theorem":[150],"are":[151,170,203],"used":[152],"suppress":[159],"resources.":[161],"With":[162],"implementation,":[164],"both":[165],"path-":[166],"gate-level":[168],"parallelisms":[169],"realized,":[171],"achieving":[172],"87":[173],"times":[174],"compared":[176],"software":[179],"case":[183],"analyzing":[185],"6bit":[187],"multiplier.":[188],"The":[189],"comparable":[192],"Mersenne":[195],"Twister":[196],"Box":[199],"Muller":[200],"methods,":[201],"well-known":[205],"high":[206],"quality":[207],"number":[211],"generator,":[212],"also":[215],"experimentally":[216],"verified.":[217]},"counts_by_year":[{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}