{"id":"https://openalex.org/W2151030231","doi":"https://doi.org/10.1109/isqed.2011.5770815","title":"Automatic generation of saturation constraints and performance expressions for geometric programming based analog circuit sizing","display_name":"Automatic generation of saturation constraints and performance expressions for geometric programming based analog circuit sizing","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2151030231","doi":"https://doi.org/10.1109/isqed.2011.5770815","mag":"2151030231"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2011.5770815","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2011.5770815","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075614477","display_name":"Supriyo Maji","orcid":"https://orcid.org/0000-0003-0629-9325"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Supriyo Maji","raw_affiliation_strings":["Department of Electronics & Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043393635","display_name":"Samiran Dam","orcid":"https://orcid.org/0000-0001-9656-9661"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Samiran Dam","raw_affiliation_strings":["Department of Electronics & Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109378297","display_name":"Pradip Mandal","orcid":"https://orcid.org/0000-0002-3767-7299"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pradip Mandal","raw_affiliation_strings":["Department of Electronics & Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5075614477"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":1.8547,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.8715055,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.6091793179512024},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5452225804328918},{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.5198274254798889},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5162118077278137},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.4876073896884918},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4282665550708771},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.35033154487609863},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33530133962631226},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2266831398010254},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.20244210958480835},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19940799474716187},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1784842610359192},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.16341349482536316}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.6091793179512024},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5452225804328918},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.5198274254798889},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5162118077278137},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.4876073896884918},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4282665550708771},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.35033154487609863},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33530133962631226},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2266831398010254},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.20244210958480835},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19940799474716187},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1784842610359192},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16341349482536316},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2011.5770815","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2011.5770815","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1553149778","https://openalex.org/W1594949991","https://openalex.org/W2000836282","https://openalex.org/W2067341947","https://openalex.org/W2075665712","https://openalex.org/W2106476087","https://openalex.org/W2109755562","https://openalex.org/W2122919983","https://openalex.org/W2138396608","https://openalex.org/W2144133630","https://openalex.org/W2159012745","https://openalex.org/W2161359911","https://openalex.org/W2163565880","https://openalex.org/W2164976766","https://openalex.org/W2165207011","https://openalex.org/W2171048418","https://openalex.org/W2989457786","https://openalex.org/W3141814318","https://openalex.org/W4235520416","https://openalex.org/W4242427575","https://openalex.org/W4300833197","https://openalex.org/W6633062741","https://openalex.org/W6669466037","https://openalex.org/W6684710362","https://openalex.org/W6685032277","https://openalex.org/W7028204224"],"related_works":["https://openalex.org/W2170314243","https://openalex.org/W2119179026","https://openalex.org/W2794947590","https://openalex.org/W2114971758","https://openalex.org/W2109932036","https://openalex.org/W4313118781","https://openalex.org/W2354546390","https://openalex.org/W2127141320","https://openalex.org/W2157874690","https://openalex.org/W4292259242"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,21,82,157,207],"new":[4],"approach":[5],"for":[6,14,42,69],"generating":[7],"saturation":[8,185],"constraints":[9],"and":[10,59,119,143,181,188],"DC":[11,187],"performance":[12,27,71,92,154,190],"expressions":[13,28,38],"analog":[15],"integrated":[16],"circuits.":[17],"It":[18],"also":[19],"proposes":[20],"generalized":[22],"method":[23,54,68],"to":[24,150,173,183],"develop":[25,151],"AC":[26,70,189],"of":[29,79,81,98,131,140,156,213],"the":[30,85,132,134,160,193,197],"same":[31],"in":[32,206],"posynomial":[33,37],"form.":[34],"The":[35,51,66,146,168],"developed":[36,194],"can":[39],"be":[40],"used":[41],"well":[43],"established":[44],"geometric":[45],"programming":[46],"(GP)":[47],"based":[48,203],"sizing":[49],"optimization.":[50],"equation":[52],"generation":[53,73],"takes":[55],"very":[56],"less":[57],"time":[58],"does":[60],"not":[61],"require":[62],"any":[63],"manual":[64],"intervention.":[65],"proposed":[67,169],"expression":[72],"is":[74,163],"built":[75],"on":[76],"two":[77,174],"levels":[78],"abstraction":[80,133,148],"circuit.":[83,158],"At":[84],"higher":[86],"level,":[87],"referred":[88],"as":[89,96,102],"macromodel,":[90],"circuit":[91,204],"metrics":[93],"are":[94,137,171,199,215],"modeled":[95],"function":[97],"device":[99,135,141,166],"parameters":[100,136],"such":[101],"transconductance":[103],"(g":[104,111],"<sub":[105,112,123],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[106,113,124],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</sub>":[107],"),":[108,115],"drain":[109],"conductance":[110],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">d</sub>":[114],"small-signal":[116],"parasitic":[117],"capacitances":[118],"overdrive":[120],"voltage":[121],"(V":[122],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">ov</sub>":[125],").":[126],"Whereas,":[127,159],"at":[128,217],"lower":[129],"level":[130],"monomial":[138],"functions":[139],"sizes":[142],"their":[144,218],"biases.":[145],"two-level":[147],"helps":[149],"technology":[152,161],"independent":[153],"model":[155],"dependency":[162],"captured":[164],"through":[165,201],"models.":[167],"methods":[170],"applied":[172],"well-known":[175],"CMOS":[176],"op-amp":[177],"topologies":[178],"namely,":[179],"two-stage":[180],"folded-cascode":[182],"generate":[184],"constraints,":[186,195],"expressions.":[191],"With":[192],"both":[196,214],"circuits":[198],"designed":[200],"GP":[202],"optimization":[205],"0.18":[208],"\u03bcm":[209],"UMC":[210],"technology.":[211],"Performances":[212],"verified":[216],"final":[219],"design":[220],"points.":[221]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
