{"id":"https://openalex.org/W2135760164","doi":"https://doi.org/10.1109/isqed.2011.5770740","title":"Debugging and optimizing high performance superscalar out-of-order processors using formal verification techniques","display_name":"Debugging and optimizing high performance superscalar out-of-order processors using formal verification techniques","publication_year":2011,"publication_date":"2011-03-01","ids":{"openalex":"https://openalex.org/W2135760164","doi":"https://doi.org/10.1109/isqed.2011.5770740","mag":"2135760164"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2011.5770740","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2011.5770740","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069623023","display_name":"Bijan Alizadeh","orcid":"https://orcid.org/0000-0003-4436-4597"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Bijan Alizadeh","raw_affiliation_strings":["Electrical and Computer Engineering Department (ECE), University of Tehran, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department (ECE), University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027837299","display_name":"Masahiro Fujita","orcid":"https://orcid.org/0000-0002-6516-4175"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Fujita","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), CREST, University of Tokyo, Tokyo, Japan","VLSI Design and Education Center (VDEC), University of Tokyo and CREST, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), CREST, University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]},{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), University of Tokyo and CREST, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"818","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8410328030586243},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.7725713849067688},{"id":"https://openalex.org/keywords/superscalar","display_name":"Superscalar","score":0.5787713527679443},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.5447890758514404},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.535783052444458},{"id":"https://openalex.org/keywords/counterexample","display_name":"Counterexample","score":0.5323427319526672},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.5281912088394165},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.5164187550544739},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4886084198951721},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.45152583718299866},{"id":"https://openalex.org/keywords/runtime-verification","display_name":"Runtime verification","score":0.4254704713821411},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4123591482639313},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.344133198261261},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.17142903804779053},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.12364369630813599},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.07621851563453674},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07319173216819763}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8410328030586243},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.7725713849067688},{"id":"https://openalex.org/C147101560","wikidata":"https://www.wikidata.org/wiki/Q1045706","display_name":"Superscalar","level":2,"score":0.5787713527679443},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.5447890758514404},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.535783052444458},{"id":"https://openalex.org/C162838799","wikidata":"https://www.wikidata.org/wiki/Q596077","display_name":"Counterexample","level":2,"score":0.5323427319526672},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.5281912088394165},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.5164187550544739},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4886084198951721},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.45152583718299866},{"id":"https://openalex.org/C202973057","wikidata":"https://www.wikidata.org/wiki/Q7380130","display_name":"Runtime verification","level":3,"score":0.4254704713821411},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4123591482639313},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.344133198261261},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.17142903804779053},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.12364369630813599},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.07621851563453674},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07319173216819763},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2011.5770740","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2011.5770740","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 12th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1514254856","https://openalex.org/W1553731663","https://openalex.org/W1574967808","https://openalex.org/W1592502301","https://openalex.org/W1680001562","https://openalex.org/W1741528175","https://openalex.org/W1840419483","https://openalex.org/W1882179541","https://openalex.org/W1978079490","https://openalex.org/W1979903718","https://openalex.org/W2039577315","https://openalex.org/W2044869629","https://openalex.org/W2049197412","https://openalex.org/W2102587899","https://openalex.org/W2106866093","https://openalex.org/W2108915071","https://openalex.org/W2110011370","https://openalex.org/W2118154221","https://openalex.org/W2135523993","https://openalex.org/W2155980215","https://openalex.org/W2163601989","https://openalex.org/W2165434470","https://openalex.org/W2178304595","https://openalex.org/W2533088220","https://openalex.org/W3145331805","https://openalex.org/W3149912375","https://openalex.org/W4230861408","https://openalex.org/W4236432903","https://openalex.org/W4239505785","https://openalex.org/W4246569419","https://openalex.org/W6634546602","https://openalex.org/W6635458761","https://openalex.org/W6638732691","https://openalex.org/W6639126637"],"related_works":["https://openalex.org/W3036403349","https://openalex.org/W2392047570","https://openalex.org/W2035244079","https://openalex.org/W4205300843","https://openalex.org/W2361881307","https://openalex.org/W4301348901","https://openalex.org/W2350806125","https://openalex.org/W2325633191","https://openalex.org/W3155012083","https://openalex.org/W2059150015"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3],"multiplexer":[4],"based":[5],"method,":[6],"which":[7],"has":[8,146],"been":[9,147],"used":[10],"for":[11,123],"RTL/gate":[12],"level":[13],"debugging,":[14],"into":[15],"cycle":[16],"accurate":[17],"design":[18],"of":[19,49,71,86,94,109,119,132,144],"high":[20],"performance":[21,30,70],"microprocessors":[22],"so":[23,52],"that":[24,42,53,106,116],"complicated":[25],"superscalar":[26],"out-of-order":[27],"processors":[28],"with":[29],"optimization":[31,64],"techniques":[32],"can":[33,56],"be":[34,98],"formally":[35],"debugged":[36],"and":[37,79,134],"optimized.":[38],"The":[39,113],"results":[40,114],"show":[41,115],"our":[43,63],"debugging":[44],"method":[45],"reduces":[46,83],"the":[47,50,59,69,72,84,87,92,95,104,107,117,120],"complexity":[48,85],"counterexamples":[51],"verification":[54,88,124,137],"engineers":[55],"quickly":[57],"locate":[58],"bugs.":[60],"In":[61],"addition,":[62],"technique":[65],"not":[66],"only":[67],"improves":[68],"target":[73],"processor":[74],"by":[75,90,100,127,139],"avoiding":[76],"unnecessary":[77],"stalls":[78],"replays,":[80],"but":[81],"also":[82,135],"process":[89],"reducing":[91],"size":[93,118],"formulas":[96,122],"to":[97,129,141],"checked":[99],"SAT/SMT":[101],"solvers":[102],"despite":[103],"fact":[105],"number":[108],"simulation":[110],"cycles":[111],"increases.":[112],"propositional":[121],"is":[125],"reduced":[126],"up":[128,140],"an":[130],"order":[131],"magnitude":[133,145],"their":[136],"time":[138],"two":[142],"orders":[143],"reduced.":[148]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}