{"id":"https://openalex.org/W1971423421","doi":"https://doi.org/10.1109/isqed.2010.5450488","title":"Improving the process variation tolerability of flip-flops for UDSM circuit design","display_name":"Improving the process variation tolerability of flip-flops for UDSM circuit design","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W1971423421","doi":"https://doi.org/10.1109/isqed.2010.5450488","mag":"1971423421"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2010.5450488","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450488","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110453549","display_name":"Eun Ju Hwang","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Eun Ju Hwang","raw_affiliation_strings":["Pohang University of Science and Technology, Pohang, South Korea","Pohang University of Science and Technology (POSTECH), Republic of Korea#TAB#"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Pohang University of Science and Technology (POSTECH), Republic of Korea#TAB#","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100662249","display_name":"Wook Kim","orcid":"https://orcid.org/0000-0003-3409-6672"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Wook Kim","raw_affiliation_strings":["Pohang University of Science and Technology, Pohang, South Korea","Pohang University of Science and Technology (POSTECH), Republic of Korea#TAB#"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Pohang University of Science and Technology (POSTECH), Republic of Korea#TAB#","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100617710","display_name":"Young Hwan Kim","orcid":"https://orcid.org/0000-0002-5532-610X"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Young Hwan Kim","raw_affiliation_strings":["Pohang University of Science and Technology, Pohang, South Korea","Pohang University of Science and Technology (POSTECH), Republic of Korea#TAB#"],"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Pohang University of Science and Technology (POSTECH), Republic of Korea#TAB#","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5110453549"],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.05710193,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"812","last_page":"817"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.8220418691635132},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.6293860673904419},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6127107739448547},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5817742347717285},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5061032176017761},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.49691393971443176},{"id":"https://openalex.org/keywords/tolerability","display_name":"Tolerability","score":0.4718477725982666},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.440108984708786},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4282546639442444},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4015674889087677},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.39727622270584106},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.3800407946109772},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3787577450275421},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23614344000816345},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.22155392169952393},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19357308745384216},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11563494801521301},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10603711009025574}],"concepts":[{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.8220418691635132},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.6293860673904419},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6127107739448547},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5817742347717285},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5061032176017761},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.49691393971443176},{"id":"https://openalex.org/C2778375690","wikidata":"https://www.wikidata.org/wiki/Q7814214","display_name":"Tolerability","level":3,"score":0.4718477725982666},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.440108984708786},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4282546639442444},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4015674889087677},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.39727622270584106},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3800407946109772},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3787577450275421},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23614344000816345},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.22155392169952393},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19357308745384216},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11563494801521301},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10603711009025574},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2010.5450488","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450488","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321640","display_name":"Ministry of Knowledge Economy","ror":"https://ror.org/008nkqk13"},{"id":"https://openalex.org/F4320322065","display_name":"National IT Industry Promotion Agency","ror":"https://ror.org/026v53e29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1525409241","https://openalex.org/W1875554762","https://openalex.org/W1899064893","https://openalex.org/W1967073752","https://openalex.org/W1970580065","https://openalex.org/W2052273370","https://openalex.org/W2077251582","https://openalex.org/W2109195618","https://openalex.org/W2117648153","https://openalex.org/W2130278895","https://openalex.org/W2137616964","https://openalex.org/W2142655944","https://openalex.org/W2152638072","https://openalex.org/W2160130898","https://openalex.org/W4299990200","https://openalex.org/W6631407737","https://openalex.org/W6639100984","https://openalex.org/W6679477203"],"related_works":["https://openalex.org/W2262031297","https://openalex.org/W2733322820","https://openalex.org/W2482318635","https://openalex.org/W2020161494","https://openalex.org/W2045056374","https://openalex.org/W2298981088","https://openalex.org/W2163601309","https://openalex.org/W2967868444","https://openalex.org/W2612923708","https://openalex.org/W3159999783"],"abstract_inverted_index":{"The":[0],"process":[1,39,71],"variation":[2,10,40,72],"of":[3,15,41,56,74,94,123],"the":[4,12,36,70,111,117,121],"ultra-deep":[5],"submicron":[6],"technology":[7],"causes":[8],"significant":[9],"in":[11,50,54],"timing":[13],"characteristics":[14],"flip-flops,":[16,82],"and":[17,102,130],"it":[18],"can":[19],"drop":[20],"functional":[21,58,103,131],"yield":[22,104,132],"seriously,":[23],"affecting":[24],"system":[25],"timing.":[26],"This":[27],"paper":[28,34,62],"has":[29],"two":[30],"objectives.":[31],"First,":[32],"this":[33,61],"investigates":[35],"sensitivities":[37],"to":[38,68,98,106],"four":[42,80],"representative":[43],"flip-flop":[44],"architectures":[45],"that":[46,91,116],"are":[47],"popularly":[48],"used":[49],"digital":[51],"circuit":[52],"designs":[53],"respect":[55],"their":[57,92],"robustness.":[59],"Secondly,":[60],"proposes":[63],"simple":[64],"but":[65],"effective":[66],"methods":[67],"improve":[69,120],"tolerability":[73],"those":[75],"flip-flops.":[76],"Experimental":[77],"results":[78,113],"on":[79],"benchmark":[81],"which":[83],"were":[84],"optimized":[85],"for":[86],"minimum":[87],"power-delay":[88],"product,":[89],"show":[90,115],"variability":[93,122],"data-to-q":[95,124],"delay":[96,125],"reaches":[97,105],"33.02%":[99],"\u223c":[100,108,128,135],"46.13%":[101],"79.93%":[107],"99.86%.":[109],"Also,":[110],"experimental":[112],"clearly":[114],"proposed":[118],"approaches":[119],"by":[126,133],"11.53%":[127],"44.78%":[129],"0.11%":[134],"24.41%.":[136]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}