{"id":"https://openalex.org/W1640439592","doi":"https://doi.org/10.1109/isqed.2010.5450483","title":"Interconnect delay and slew metrics using the extreme value distribution","display_name":"Interconnect delay and slew metrics using the extreme value distribution","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W1640439592","doi":"https://doi.org/10.1109/isqed.2010.5450483","mag":"1640439592"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2010.5450483","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450483","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033354228","display_name":"Jun-Kuei Zeng","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Jun-Kuei Zeng","raw_affiliation_strings":["Electr. Eng. Dept., Nat. Taiwan Univ., Taipei, Taiwan","National Taiwan University Electrical Engineering Department, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electr. Eng. Dept., Nat. Taiwan Univ., Taipei, Taiwan","institution_ids":[]},{"raw_affiliation_string":"National Taiwan University Electrical Engineering Department, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007786120","display_name":"Chung-Ping Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chung-Ping Chen","raw_affiliation_strings":["Electr. Eng. Dept., Nat. Taiwan Univ., Taipei, Taiwan","National Taiwan University Electrical Engineering Department, Taiwan"],"affiliations":[{"raw_affiliation_string":"Electr. Eng. Dept., Nat. Taiwan Univ., Taipei, Taiwan","institution_ids":[]},{"raw_affiliation_string":"National Taiwan University Electrical Engineering Department, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5033354228"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04359716,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"818","last_page":"823"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.8235675096511841},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.605979859828949},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5902552604675293},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5189425945281982},{"id":"https://openalex.org/keywords/elmore-delay","display_name":"Elmore delay","score":0.5065790414810181},{"id":"https://openalex.org/keywords/standard-deviation","display_name":"Standard deviation","score":0.4845220446586609},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4837810695171356},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.4283524751663208},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.40712183713912964},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.3842521607875824},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24410337209701538},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2126496136188507},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19939687848091125},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1980726420879364},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.13568854331970215},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13189703226089478}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.8235675096511841},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.605979859828949},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5902552604675293},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5189425945281982},{"id":"https://openalex.org/C84434228","wikidata":"https://www.wikidata.org/wiki/Q4531332","display_name":"Elmore delay","level":4,"score":0.5065790414810181},{"id":"https://openalex.org/C22679943","wikidata":"https://www.wikidata.org/wiki/Q159375","display_name":"Standard deviation","level":2,"score":0.4845220446586609},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4837810695171356},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.4283524751663208},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.40712183713912964},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.3842521607875824},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24410337209701538},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2126496136188507},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19939687848091125},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1980726420879364},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.13568854331970215},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13189703226089478},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2010.5450483","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450483","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W571322228","https://openalex.org/W1555121108","https://openalex.org/W1864638550","https://openalex.org/W1977774784","https://openalex.org/W1984588379","https://openalex.org/W2007380193","https://openalex.org/W2018785091","https://openalex.org/W2101772490","https://openalex.org/W2104487433","https://openalex.org/W2107608152","https://openalex.org/W2123692429","https://openalex.org/W2126102336","https://openalex.org/W2127400344","https://openalex.org/W2145224695","https://openalex.org/W2149472471","https://openalex.org/W2153558271","https://openalex.org/W2154363431","https://openalex.org/W2169269717","https://openalex.org/W4236005074","https://openalex.org/W4244818444","https://openalex.org/W4247970051","https://openalex.org/W6639388383","https://openalex.org/W6674875815","https://openalex.org/W6675597687","https://openalex.org/W6679020412","https://openalex.org/W6829636747"],"related_works":["https://openalex.org/W2114232017","https://openalex.org/W2020200124","https://openalex.org/W1691923927","https://openalex.org/W2026652885","https://openalex.org/W2380365775","https://openalex.org/W2182628752","https://openalex.org/W4211170193","https://openalex.org/W4238419543","https://openalex.org/W2101823170","https://openalex.org/W2373416410"],"abstract_inverted_index":{"As":[0,32],"integrated":[1],"circuit":[2],"process":[3],"technology":[4],"is":[5,23],"changing":[6],"into":[7,64],"the":[8,13,62,101,122],"ultra":[9],"deep":[10],"submicron":[11],"era,":[12],"complex":[14],"interconnection":[15,30],"topology":[16],"and":[17,67,79,89,112,118,126],"metal":[18],"resistance":[19],"shielding":[20],"effects":[21],"problem":[22],"very":[24,28],"serious,":[25],"resulting":[26],"in":[27,132],"stiff":[29,36],"structure.":[31],"inaccurate":[33,116],"delay":[34,71,88],"on":[35,44,95],"interconnect":[37,63,93],"sinks":[38,117],"creates":[39],"a":[40,86],"situation":[41],"where":[42],"decisions":[43],"when":[45],"to":[46,81,110],"evaluate":[47],"by":[48],"statistical":[49],"static":[50],"time":[51],"analysis":[52],"(SSTA)":[53],"are":[54,77,107,129],"not":[55],"cluster":[56],"distribution,":[57],"we":[58,84],"cannot":[59],"roughly":[60],"classify":[61],"near-end,":[65],"middle-end,":[66],"far-end.":[68],"Although":[69],"several":[70],"metrics":[72,106],"have":[73],"been":[74],"proposed,":[75],"they":[76],"inefficient":[78],"difficult":[80],"implement.":[82],"Hence,":[83],"propose":[85],"new":[87],"slew":[90],"metric":[91],"for":[92],"based":[94],"Extreme":[96],"Value":[97],"Distribution":[98],"only":[99],"using":[100],"first":[102],"two":[103],"moments.":[104],"Our":[105],"efficient,":[108],"easy":[109],"implement,":[111],"can":[113],"precisely":[114],"label":[115],"efficiently":[119],"calibrate":[120],"them;":[121],"overall":[123],"standard":[124],"deviation":[125],"error":[127],"mean":[128],"smaller":[130],"than":[131],"previous":[133],"works.":[134]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
