{"id":"https://openalex.org/W3150983477","doi":"https://doi.org/10.1109/isqed.2010.5450474","title":"Coprocessor design space exploration using high level synthesis","display_name":"Coprocessor design space exploration using high level synthesis","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W3150983477","doi":"https://doi.org/10.1109/isqed.2010.5450474","mag":"3150983477"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2010.5450474","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450474","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033509734","display_name":"Avinash Lakshminarayana","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Avinash Lakshminarayana","raw_affiliation_strings":["FERMAT Laboratory, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"FERMAT Laboratory, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005028151","display_name":"Sumit Ahuja","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sumit Ahuja","raw_affiliation_strings":["FERMAT Laboratory, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"FERMAT Laboratory, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021517996","display_name":"Sandeep K. Shukla","orcid":"https://orcid.org/0000-0001-5525-7426"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sandeep Shukla","raw_affiliation_strings":["FERMAT Laboratory, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA"],"affiliations":[{"raw_affiliation_string":"FERMAT Laboratory, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5033509734"],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":0.7491,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.75667341,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"879","last_page":"884"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.9371176958084106},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7603597044944763},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.7272623181343079},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.6388990879058838},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.572579026222229},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5391168594360352},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5226973295211792},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.46031543612480164},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.25944983959198},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20728760957717896},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.15329277515411377},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09945598244667053}],"concepts":[{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.9371176958084106},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7603597044944763},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.7272623181343079},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.6388990879058838},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.572579026222229},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5391168594360352},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5226973295211792},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.46031543612480164},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.25944983959198},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20728760957717896},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.15329277515411377},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09945598244667053}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2010.5450474","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450474","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2036893593","https://openalex.org/W2096994867","https://openalex.org/W2134143063","https://openalex.org/W4236089896"],"related_works":["https://openalex.org/W4281926497","https://openalex.org/W2005724428","https://openalex.org/W2269990635","https://openalex.org/W2987062793","https://openalex.org/W2108242004","https://openalex.org/W2141458065","https://openalex.org/W4312985392","https://openalex.org/W3150983477","https://openalex.org/W2042762783","https://openalex.org/W2591741338"],"abstract_inverted_index":{"Hardware/software":[0],"co-design":[1,13],"has":[2],"been":[3],"an":[4,114],"area":[5],"of":[6,24,39,96],"research":[7],"for":[8,20],"a":[9,25,50,59,67,76,94,100],"few":[10],"decades.":[11],"Currently":[12],"is":[14,49],"utilized":[15],"to":[16,61,66,74,84],"create":[17],"hardware":[18,41,88],"coprocessors":[19,42],"compute":[21],"intensive":[22],"tasks":[23],"system":[26],"(which":[27],"otherwise,":[28],"performed":[29],"in":[30,80,107,111],"software,":[31],"will":[32],"not":[33],"meet":[34],"the":[35],"performance":[36],"goals).":[37],"Design":[38],"correct":[40],"with":[43],"area,":[44],"timing":[45],"and":[46],"power":[47],"constraints":[48],"time":[51],"consuming":[52],"task.":[53],"In":[54],"this":[55,63],"paper,":[56],"we":[57,71,91],"present":[58],"methodology":[60],"alleviate":[62],"problem":[64],"up":[65],"certain":[68],"extent.":[69],"First,":[70],"show":[72],"how":[73],"adopt":[75],"high-level":[77],"synthesis":[78],"tool":[79],"design":[81],"space":[82],"exploration":[83,115],"converge":[85],"towards":[86],"efficient":[87],"coprocessors.":[89],"Second,":[90],"show,":[92],"through":[93],"series":[95],"case":[97],"studies":[98],"that,":[99],"system-level":[101],"approach,":[102],"keeping":[103],"platform":[104],"specific":[105],"optimizations":[106],"mind,":[108],"can":[109],"help":[110],"doing":[112],"such":[113],"efficiently.":[116]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
