{"id":"https://openalex.org/W1987603499","doi":"https://doi.org/10.1109/isqed.2010.5450403","title":"A robust and low power dual data rate (DDR) flip-flop using c-elements","display_name":"A robust and low power dual data rate (DDR) flip-flop using c-elements","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W1987603499","doi":"https://doi.org/10.1109/isqed.2010.5450403","mag":"1987603499"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2010.5450403","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450403","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017870830","display_name":"Srikanth V. Devarapalli","orcid":null},"institutions":[{"id":"https://openalex.org/I169521973","display_name":"University of New Mexico","ror":"https://ror.org/05fs6jp91","country_code":"US","type":"education","lineage":["https://openalex.org/I169521973"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Srikanth V. Devarapalli","raw_affiliation_strings":["Department of ECE, University of New Mexico, Albuquerque, NM, USA","Department of ECE, University of New Mexico, Albuquerque, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of ECE, University of New Mexico, Albuquerque, NM, USA","institution_ids":["https://openalex.org/I169521973"]},{"raw_affiliation_string":"Department of ECE, University of New Mexico, Albuquerque, USA#TAB#","institution_ids":["https://openalex.org/I169521973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018095974","display_name":"Payman Zarkesh-Ha","orcid":"https://orcid.org/0000-0002-0571-9212"},"institutions":[{"id":"https://openalex.org/I169521973","display_name":"University of New Mexico","ror":"https://ror.org/05fs6jp91","country_code":"US","type":"education","lineage":["https://openalex.org/I169521973"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Payman Zarkesh-Ha","raw_affiliation_strings":["Department of ECE, University of New Mexico, Albuquerque, NM, USA","Department of ECE, University of New Mexico, Albuquerque, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of ECE, University of New Mexico, Albuquerque, NM, USA","institution_ids":["https://openalex.org/I169521973"]},{"raw_affiliation_string":"Department of ECE, University of New Mexico, Albuquerque, USA#TAB#","institution_ids":["https://openalex.org/I169521973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110309884","display_name":"Steven C. Suddarth","orcid":null},"institutions":[{"id":"https://openalex.org/I169521973","display_name":"University of New Mexico","ror":"https://ror.org/05fs6jp91","country_code":"US","type":"education","lineage":["https://openalex.org/I169521973"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven C. Suddarth","raw_affiliation_strings":["Department of ECE, University of New Mexico, Albuquerque, NM, USA","Department of ECE, University of New Mexico, Albuquerque, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of ECE, University of New Mexico, Albuquerque, NM, USA","institution_ids":["https://openalex.org/I169521973"]},{"raw_affiliation_string":"Department of ECE, University of New Mexico, Albuquerque, USA#TAB#","institution_ids":["https://openalex.org/I169521973"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5017870830"],"corresponding_institution_ids":["https://openalex.org/I169521973"],"apc_list":null,"apc_paid":null,"fwci":1.7318,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.85051628,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"147","last_page":"150"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.8259850144386292},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5999212265014648},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5440229177474976},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.5370051264762878},{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.4827110469341278},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.478633314371109},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4772343933582306},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.44863244891166687},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43671518564224243},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.43411898612976074},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4131714403629303},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.40549612045288086},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.28251272439956665},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.275701642036438},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2686302959918976},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20808982849121094},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17965319752693176},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.13561281561851501},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08304813504219055}],"concepts":[{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.8259850144386292},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5999212265014648},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5440229177474976},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.5370051264762878},{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.4827110469341278},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.478633314371109},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4772343933582306},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.44863244891166687},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43671518564224243},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.43411898612976074},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4131714403629303},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.40549612045288086},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.28251272439956665},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.275701642036438},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2686302959918976},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20808982849121094},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17965319752693176},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.13561281561851501},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08304813504219055},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2010.5450403","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2010.5450403","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 11th International Symposium on Quality Electronic Design (ISQED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W127926626","https://openalex.org/W2023138935","https://openalex.org/W2127639550","https://openalex.org/W2153903506","https://openalex.org/W2161549238"],"related_works":["https://openalex.org/W2085381517","https://openalex.org/W2132410050","https://openalex.org/W3013924136","https://openalex.org/W2121552467","https://openalex.org/W999775051","https://openalex.org/W4238211836","https://openalex.org/W2151858599","https://openalex.org/W2071924372","https://openalex.org/W4284685595","https://openalex.org/W2377552037"],"abstract_inverted_index":{"To":[0],"maintain":[1],"the":[2,9,21,41,50,54,60,71,76,118,134,157],"performance":[3,162],"of":[4,13,23,83,87,133],"digital":[5],"systems,":[6],"while":[7],"reducing":[8],"energy":[10],"consumption,":[11],"implementation":[12],"dual":[14,35,43],"edge":[15,36],"flip":[16,47],"flops":[17,48],"has":[18],"recently":[19],"become":[20],"focus":[22],"many":[24],"researchers.":[25],"This":[26],"paper":[27],"presents":[28],"a":[29,63,97],"new":[30],"robust":[31,99],"and":[32,151,163],"low":[33,92,164],"power":[34,79,165],"flip-flop":[37],"using":[38],"c-elements.":[39],"Unlike":[40],"existing":[42],"data":[44],"rate":[45],"(DDR)":[46],"[1-4],":[49],"proposed":[51,119,135,145],"circuit":[52],"uses":[53,147],"direct":[55],"clock":[56,72,77],"pulses":[57],"to":[58],"latch":[59],"data,":[61],"without":[62],"need":[64],"for":[65,70,101,160],"additional":[66],"pulse":[67],"generator":[68],"circuitry":[69],"signal,":[73],"which":[74],"lowers":[75],"dynamic":[78],"consumption":[80],"by":[81],"factor":[82],"2\u00d7.":[84],"Moreover,":[85],"because":[86],"its":[88,141],"simplicity":[89],"with":[90,106,125],"very":[91],"transistor":[93],"count,":[94],"it":[95],"provides":[96],"more":[98],"solution":[100],"DDR":[102],"flip-flops.":[103],"In":[104],"comparison":[105],"ep-DSFF":[107],"(explicit-pulsed":[108],"static":[109],"hybrid":[110],"flop)":[111],"[1]":[112],"at":[113],"45":[114],"nm":[115],"CMOS":[116],"process,":[117],"DDR-FF":[120,136,146],"consumes":[121],"32%":[122],"less":[123,127],"power,":[124],"12%":[126],"C2Q":[128],"delay.":[129],"The":[130,144],"power-delay":[131],"product":[132],"is":[137],"41%":[138],"better":[139],"than":[140],"counterpart,":[142],"ep-DSFF.":[143],"only":[148],"24":[149],"transistors":[150],"can":[152],"easily":[153],"be":[154],"implemented":[155],"into":[156],"cell":[158],"libraries":[159],"high":[161],"ASIC":[166],"design":[167],"flow.":[168]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
