{"id":"https://openalex.org/W2131302279","doi":"https://doi.org/10.1109/isqed.2009.4810368","title":"An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation","display_name":"An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2131302279","doi":"https://doi.org/10.1109/isqed.2009.4810368","mag":"2131302279"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810368","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810368","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003123174","display_name":"Xiaoji Ye","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xiaoji Ye","raw_affiliation_strings":["Department of ECE, Texas A and M University, USA","Dept. of ECE, Texas A&M Univ., USA"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Texas A and M University, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of ECE, Texas A&M Univ., USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100432782","display_name":"Peng Li","orcid":"https://orcid.org/0000-0003-3548-4589"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peng Li","raw_affiliation_strings":["Department of ECE, Texas A and M University, USA","Dept. of ECE, Texas A&M Univ., USA"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Texas A and M University, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of ECE, Texas A&M Univ., USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5003123174"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":0.2404,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58423168,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"15","issue":null,"first_page":"634","last_page":"640"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11206","display_name":"Model Reduction and Neural Networks","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11206","display_name":"Model Reduction and Neural Networks","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.7320126295089722},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.6377319097518921},{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.6269817352294922},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6233826875686646},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.603942334651947},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.5853358507156372},{"id":"https://openalex.org/keywords/clock-network","display_name":"Clock network","score":0.5058793425559998},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.4912838339805603},{"id":"https://openalex.org/keywords/vector-clock","display_name":"Vector clock","score":0.47950202226638794},{"id":"https://openalex.org/keywords/performance-metric","display_name":"Performance metric","score":0.4465840458869934},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.4389956295490265},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.43649137020111084},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4329044222831726},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.4274601936340332},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.3841966390609741},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.3207826614379883},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2751423120498657},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.19870281219482422},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.144830584526062},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1397542953491211}],"concepts":[{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.7320126295089722},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.6377319097518921},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.6269817352294922},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6233826875686646},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.603942334651947},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.5853358507156372},{"id":"https://openalex.org/C2778182565","wikidata":"https://www.wikidata.org/wiki/Q1752879","display_name":"Clock network","level":5,"score":0.5058793425559998},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.4912838339805603},{"id":"https://openalex.org/C52563298","wikidata":"https://www.wikidata.org/wiki/Q1413349","display_name":"Vector clock","level":5,"score":0.47950202226638794},{"id":"https://openalex.org/C2780898871","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Performance metric","level":2,"score":0.4465840458869934},{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.4389956295490265},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.43649137020111084},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4329044222831726},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.4274601936340332},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.3841966390609741},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.3207826614379883},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2751423120498657},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.19870281219482422},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.144830584526062},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1397542953491211},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810368","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810368","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7599999904632568}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1540004773","https://openalex.org/W1555121108","https://openalex.org/W1978981235","https://openalex.org/W2005624023","https://openalex.org/W2102625499","https://openalex.org/W2115468286","https://openalex.org/W2120553722","https://openalex.org/W2122608783","https://openalex.org/W2168228138","https://openalex.org/W4234342622","https://openalex.org/W4254534263","https://openalex.org/W6685007442"],"related_works":["https://openalex.org/W2088914741","https://openalex.org/W4247180033","https://openalex.org/W2617666058","https://openalex.org/W2787237207","https://openalex.org/W2148462217","https://openalex.org/W2411759562","https://openalex.org/W2033989103","https://openalex.org/W1596690381","https://openalex.org/W2981406251","https://openalex.org/W2520965597"],"abstract_inverted_index":{"Clock":[0],"mesh":[1,22,58,75,85,123,153,182],"has":[2],"been":[3],"widely":[4],"adopted":[5],"in":[6,29],"microprocessor":[7],"designs":[8,51],"to":[9,13,25,69,128,159],"distribute":[10],"clock":[11,14,21,30,42,57,74,84,122,152,181],"signal":[12],"sink":[15,35],"nodes.":[16],"The":[17],"primary":[18],"goal":[19],"of":[20,73,91,101,121,150,161,163],"design":[23,59,86,178],"is":[24,38,87],"minimize":[26],"undesired":[27],"difference":[28],"arrival":[31],"time":[32],"between":[33],"different":[34],"nodes,":[36],"which":[37,117],"also":[39],"known":[40],"as":[41,61,174,176],"skew.":[43],"Moreover,":[44],"the":[45,56,70,92,119,134,147,172],"needs":[46],"for":[47,180],"high-performance":[48],"low-power":[49],"chip":[50],"impose":[52],"other":[53],"constraints":[54],"on":[55],"such":[60],"limited":[62],"power":[63],"dissipation":[64],"and":[65,76],"area":[66],"consumption.":[67],"Due":[68],"enormous":[71],"size":[72],"those":[77],"complex":[78],"constraint":[79],"conditions,":[80],"achieving":[81],"an":[82,140],"optimal":[83],"very":[88,169],"challenging.":[89],"Most":[90],"gradient-based":[93],"optimization":[94,173],"methods":[95],"require":[96],"quick":[97],"yet":[98,111],"accurate":[99],"calculation":[100],"gradients/sensitivities":[102],"information.":[103],"In":[104],"this":[105],"paper,":[106],"we":[107],"present":[108],"a":[109],"precise":[110],"efficient":[112],"adjoint":[113,136,143],"sensitivity":[114,120,137,144,156],"analysis":[115,138,145],"framework":[116],"computes":[118],"performance":[124,154],"metric":[125,155],"with":[126,157],"respect":[127,158],"every":[129],"circuit":[130,164],"parameter.":[131],"By":[132],"evolving":[133],"traditional":[135],"into":[139],"application-specific,":[141],"customized":[142],"framework,":[146],"daunting":[148],"task":[149],"computing":[151],"hundreds":[160],"thousands":[162],"parameters":[165],"can":[166],"be":[167],"accomplished":[168],"efficiently,":[170],"making":[171],"well":[175],"incremental":[177],"approaches":[179],"tractable.":[183]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
