{"id":"https://openalex.org/W2150280652","doi":"https://doi.org/10.1109/isqed.2009.4810340","title":"Standby power reduction and SRAM cell optimization for 65nm technology","display_name":"Standby power reduction and SRAM cell optimization for 65nm technology","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2150280652","doi":"https://doi.org/10.1109/isqed.2009.4810340","mag":"2150280652"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810340","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810340","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035749038","display_name":"S. Lakshminarayanan","orcid":"https://orcid.org/0000-0003-4323-6315"},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"S. Lakshminarayanan","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078389333","display_name":"Jingon Joung","orcid":"https://orcid.org/0000-0002-9551-1123"},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Joung","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068890173","display_name":"Giri Narasimhan","orcid":"https://orcid.org/0000-0003-0535-4871"},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Narasimhan","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112325435","display_name":"R. Kapre","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Kapre","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073642737","display_name":"Martin Slanina","orcid":"https://orcid.org/0000-0001-5418-4843"},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Slanina","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108729937","display_name":"J. Tung","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J. Tung","raw_affiliation_strings":["Cypress Semiconductor Corporation, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductor Corporation, Hsinchu, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041131828","display_name":"Morgan Whately","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127281","display_name":"Cypress Semiconductor Corporation (United States)","ror":"https://ror.org/02wpc5d77","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Whately","raw_affiliation_strings":["Cypress Semiconductors, Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cypress Semiconductors, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I4210127281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003090534","display_name":"C-L. Hou","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"C-L. Hou","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001413404","display_name":"W-J. Liao","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"W-J. Liao","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054509075","display_name":"S-C. Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"S-C. Lin","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060754113","display_name":"P-G. Ma","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"P-G. Ma","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044044916","display_name":"C-W. Fan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"C-W. Fan","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059356856","display_name":"M. S. Hsieh","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"M-C. Hsieh","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050924975","display_name":"F-C. Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"F-C. Liu","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078047137","display_name":"K.W. Yeh","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"K-L. Yeh","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005444168","display_name":"W-C. Tseng","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"W-C. Tseng","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5104166937","display_name":"Sihui Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"S.W. Lu","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":17,"corresponding_author_ids":["https://openalex.org/A5035749038"],"corresponding_institution_ids":["https://openalex.org/I4210127281"],"apc_list":null,"apc_paid":null,"fwci":2.9908,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.91579399,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"471","last_page":"475"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8080049753189087},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.7827990055084229},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6617205142974854},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.649189293384552},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.5857850909233093},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.5710054039955139},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5602984428405762},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5451301336288452},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5408968925476074},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.5367487668991089},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4902658760547638},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4895714223384857},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.48059722781181335},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4765073359012604},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4755370616912842},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.43349355459213257},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4153681993484497},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3111205995082855},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.19357502460479736},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18992102146148682},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09454354643821716},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07535544037818909}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8080049753189087},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.7827990055084229},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6617205142974854},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.649189293384552},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.5857850909233093},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.5710054039955139},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5602984428405762},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5451301336288452},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5408968925476074},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.5367487668991089},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4902658760547638},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4895714223384857},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.48059722781181335},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4765073359012604},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4755370616912842},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.43349355459213257},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4153681993484497},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3111205995082855},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.19357502460479736},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18992102146148682},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09454354643821716},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07535544037818909},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810340","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810340","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6100000143051147}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1549072435","https://openalex.org/W1759929813","https://openalex.org/W1766933113","https://openalex.org/W1991232039","https://openalex.org/W2101003251","https://openalex.org/W2109600042","https://openalex.org/W2153325201","https://openalex.org/W2738467824"],"related_works":["https://openalex.org/W2035235047","https://openalex.org/W2120398954","https://openalex.org/W2085719533","https://openalex.org/W2773448237","https://openalex.org/W2119312496","https://openalex.org/W2188598220","https://openalex.org/W2182823075","https://openalex.org/W4247460323","https://openalex.org/W2537086382","https://openalex.org/W2110253107"],"abstract_inverted_index":{"Standby":[0],"power":[1,11],"is":[2,74,96,112],"one":[3],"of":[4,22,191],"the":[5,20,93,100,110,142,151,159,172,177,186,188,192],"most":[6],"critical":[7],"issues":[8],"in":[9,28,46,163],"low":[10],"chip":[12],"applications.":[13],"In":[14],"this":[15],"paper,":[16],"we":[17],"have":[18],"investigated":[19],"effects":[21],"body":[23,59,138,181],"bias":[24,27,182],"and":[25,106,126,136],"source":[26],"65":[29],"nm":[30],"technology":[31],"through":[32],"simulations":[33],"on":[34,66,185],"SRAM":[35,70,94],"standby":[36],"current":[37,128],"(Isb).":[38],"The":[39,115],"simulation":[40],"results":[41],"show":[42],"a":[43,55,67,78,107],"8X":[44],"reduction":[45,86],"cell":[47,95,143,193],"Isb":[48],"at":[49,130,179],"125degC":[50],"FF":[51],"process":[52,131],"corner":[53],"with":[54],"1.0":[56],"V":[57,90],"NMOS":[58],"bias.":[60],"This":[61],"has":[62],"been":[63],"experimentally":[64],"verified":[65],"16":[68,116],"Mb":[69,117],"testchip.":[71],"Source":[72],"biasing":[73],"shown":[75],"to":[76,98,140,157,175],"be":[77],"more":[79],"effective":[80],"technique":[81],"for":[82,109,121,150,195],"room":[83],"temperature":[84],"leakage":[85],"(~3X":[87],"lower":[88],"Isb@0.4":[89],"bias).":[91],"Optimizing":[92],"crucial":[97],"meet":[99],"product":[101],"performance":[102],"requirements":[103],"across":[104],"corners":[105,132],"methodology":[108],"same":[111],"also":[113],"described.":[114],"testchip":[118],"was":[119],"characterized":[120],"read":[122,127],"disturb,":[123],"write":[124],"margin":[125,129,198],"by":[133],"applying":[134],"forward":[135],"reverse":[137],"biases":[139],"shift":[141],"transistor":[144],"parameters.":[145],"Different":[146],"test":[147],"sequences":[148],"tailored":[149],"parameter":[152],"being":[153],"measured":[154,173],"were":[155,169,199],"used":[156],"determine":[158],"failing":[160],"bit":[161],"count":[162],"each":[164,180],"case.":[165],"Voltage":[166],"schmoo":[167],"plots":[168],"generated":[170],"from":[171],"data":[174],"obtain":[176],"Vccmin":[178],"condition.":[183],"Based":[184],"above,":[187],"threshold":[189],"voltages":[190],"transistors":[194],"maximum":[196],"operating":[197],"derived.":[200]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}