{"id":"https://openalex.org/W2039895926","doi":"https://doi.org/10.1109/isqed.2009.4810324","title":"An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs","display_name":"An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2039895926","doi":"https://doi.org/10.1109/isqed.2009.4810324","mag":"2039895926"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810324","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810324","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007065352","display_name":"Mrinal Bose","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Mrinal Bose","raw_affiliation_strings":["Technology Solutions Organization, Freescale Semiconductor, Inc., USA","Technology Solutions Organization, Freescale Semiconductor Inc., USA"],"affiliations":[{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor, Inc., USA","institution_ids":[]},{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor Inc., USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108715049","display_name":"Prashant S Naphade","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Prashant Naphade","raw_affiliation_strings":["Technology Solutions Organization, Freescale Semiconductor, Inc., USA","Technology Solutions Organization, Freescale Semiconductor Inc., USA"],"affiliations":[{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor, Inc., USA","institution_ids":[]},{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor Inc., USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":null,"display_name":"Jay Bhadra","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jay Bhadra","raw_affiliation_strings":["Technology Solutions Organization, Freescale Semiconductor, Inc., USA","Technology Solutions Organization, Freescale Semiconductor Inc., USA"],"affiliations":[{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor, Inc., USA","institution_ids":[]},{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor Inc., USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053568746","display_name":"Hillel Miller","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hillel Miller","raw_affiliation_strings":["Technology Solutions Organization, Freescale Semiconductor, Inc., USA","Technology Solutions Organization, Freescale Semiconductor Inc., USA"],"affiliations":[{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor, Inc., USA","institution_ids":[]},{"raw_affiliation_string":"Technology Solutions Organization, Freescale Semiconductor Inc., USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5007065352"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.268,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56545196,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"377","last_page":"381"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7869374752044678},{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.6721290946006775},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5910208225250244},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5648306608200073},{"id":"https://openalex.org/keywords/usability","display_name":"Usability","score":0.5606365203857422},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5346172451972961},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5119308233261108},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.470182329416275},{"id":"https://openalex.org/keywords/embedded-software","display_name":"Embedded software","score":0.42170578241348267},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2622011601924896},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1717551052570343}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7869374752044678},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.6721290946006775},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5910208225250244},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5648306608200073},{"id":"https://openalex.org/C170130773","wikidata":"https://www.wikidata.org/wiki/Q216378","display_name":"Usability","level":2,"score":0.5606365203857422},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5346172451972961},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5119308233261108},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.470182329416275},{"id":"https://openalex.org/C154488198","wikidata":"https://www.wikidata.org/wiki/Q1335007","display_name":"Embedded software","level":3,"score":0.42170578241348267},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2622011601924896},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1717551052570343},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810324","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810324","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5600000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1482910257","https://openalex.org/W1490819086","https://openalex.org/W1767037789","https://openalex.org/W1936351408","https://openalex.org/W2124135152"],"related_works":["https://openalex.org/W107105315","https://openalex.org/W1584537303","https://openalex.org/W4388155270","https://openalex.org/W4367156293","https://openalex.org/W2750549761","https://openalex.org/W1872724644","https://openalex.org/W28826848","https://openalex.org/W2122272819","https://openalex.org/W2994151208","https://openalex.org/W2130894091"],"abstract_inverted_index":{"SoC":[0],"verification":[1],"efforts":[2],"involve":[3],"multiple":[4],"models":[5,24,57],"of":[6,21,42,51,58],"the":[7,40,52,84],"design":[8,18],"-":[9],"RTL,":[10],"FPGA,":[11],"silicon":[12],"and":[13,75],"software":[14,77],"models.":[15,45],"With":[16],"increasing":[17],"complexity,":[19],"re-use":[20],"tests":[22,43,64],"between":[23],"is":[25],"a":[26,33,59,73,76],"must.":[27],"In":[28],"this":[29],"paper,":[30],"we":[31],"introduce":[32],"stimulus":[34],"abstraction":[35,53],"mechanism":[36,54],"which":[37],"greatly":[38],"increases":[39],"re-usability":[41],"across":[44],"We":[46],"then":[47],"demonstrate":[48],"an":[49,69],"implementation":[50],"on":[55],"two":[56],"PCI-express":[60],"based":[61],"design.":[62],"Identical":[63],"are":[65],"used":[66],"to":[67,82],"drive":[68],"RTL":[70],"model":[71,78],"via":[72,79],"BFM":[74],"stream":[80],"sockets":[81],"achieve":[83],"same":[85],"result.":[86]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2025-10-10T00:00:00"}