{"id":"https://openalex.org/W2113944873","doi":"https://doi.org/10.1109/isqed.2009.4810321","title":"Accelerating jitter tolerance qualification for high speed serial interfaces","display_name":"Accelerating jitter tolerance qualification for high speed serial interfaces","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2113944873","doi":"https://doi.org/10.1109/isqed.2009.4810321","mag":"2113944873"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810321","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810321","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101632967","display_name":"Yongquan Fan","orcid":"https://orcid.org/0000-0001-8854-2557"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Yongquan Fan","raw_affiliation_strings":["Department of ECE, McGill University, Canada","Department of ECE, McGill University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, McGill University, Canada","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Department of ECE, McGill University, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062514163","display_name":"\u017deljko \u017dili\u0107","orcid":"https://orcid.org/0000-0002-6887-3911"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Zeljko Zilic","raw_affiliation_strings":["Department of ECE, McGill University, Canada","Department of ECE, McGill University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, McGill University, Canada","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Department of ECE, McGill University, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5023651"],"apc_list":null,"apc_paid":null,"fwci":3.3979,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.92694261,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"360","last_page":"365"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9521194696426392},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7547829747200012},{"id":"https://openalex.org/keywords/gigabit","display_name":"Gigabit","score":0.7242690324783325},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5039510130882263},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.4677550792694092},{"id":"https://openalex.org/keywords/serial-communication","display_name":"Serial communication","score":0.4259192943572998},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3397957682609558},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29531800746917725},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1585426926612854},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.086636483669281},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07257619500160217}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9521194696426392},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7547829747200012},{"id":"https://openalex.org/C21922175","wikidata":"https://www.wikidata.org/wiki/Q3105497","display_name":"Gigabit","level":2,"score":0.7242690324783325},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5039510130882263},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.4677550792694092},{"id":"https://openalex.org/C51707140","wikidata":"https://www.wikidata.org/wiki/Q518280","display_name":"Serial communication","level":2,"score":0.4259192943572998},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3397957682609558},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29531800746917725},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1585426926612854},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.086636483669281},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07257619500160217},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810321","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810321","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1597062741","https://openalex.org/W1933111953","https://openalex.org/W2020584063","https://openalex.org/W2124283149","https://openalex.org/W2135729931","https://openalex.org/W2147586450","https://openalex.org/W2155068431","https://openalex.org/W2798333393","https://openalex.org/W3128611524"],"related_works":["https://openalex.org/W2121182846","https://openalex.org/W2315668284","https://openalex.org/W2155789024","https://openalex.org/W3213608175","https://openalex.org/W3117675750","https://openalex.org/W2141743053","https://openalex.org/W2109491806","https://openalex.org/W3095633856","https://openalex.org/W2058044441","https://openalex.org/W2343144621"],"abstract_inverted_index":{"We":[0],"witness":[1],"a":[2,38],"phenomenal":[3],"increase":[4],"in":[5,74,100],"the":[6,23,27,49,67,95],"use":[7],"of":[8,17,79,97],"high-speed":[9],"serial":[10],"interfaces":[11],"(HSSIs).":[12],"Post-silicon":[13],"validation":[14,75],"and":[15,26,76],"testing":[16],"HSSIs":[18],"are":[19],"critical":[20],"to":[21,45,48,59,72,77],"guarantee":[22],"design":[24],"quality":[25],"device":[28],"quality.":[29],"Jitter":[30],"tolerance":[31],"at":[32,86],"10-12Bit":[33],"Error":[34],"Rate":[35],"(BER)":[36],"is":[37,42],"key":[39],"parameter":[40],"that":[41],"very":[43],"costly":[44],"qualify":[46],"due":[47],"long":[50],"test":[51,68],"time.":[52],"This":[53],"paper":[54],"considers":[55],"an":[56],"acceleration":[57],"scheme":[58],"quantify":[60],"post-silicon":[61],"jitter":[62],"tolerance.":[63],"It":[64],"can":[65],"reduce":[66],"time":[69],"from":[70],"hours":[71],"seconds":[73],"tens":[78],"milliseconds":[80],"for":[81],"compliance":[82],"testing.":[83],"Experimental":[84],"results":[85],"3":[87],"Gigabit":[88],"per":[89],"second":[90],"(Gbps)":[91],"data":[92],"rate":[93],"demonstrate":[94],"accuracy":[96],"our":[98],"technique":[99],"pico-second":[101],"range.":[102]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}