{"id":"https://openalex.org/W2104461060","doi":"https://doi.org/10.1109/isqed.2009.4810310","title":"Statistical static performance analysis of asynchronous circuits considering process variation","display_name":"Statistical static performance analysis of asynchronous circuits considering process variation","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2104461060","doi":"https://doi.org/10.1109/isqed.2009.4810310","mag":"2104461060"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810310","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810310","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078040742","display_name":"Mohsen Raji","orcid":"https://orcid.org/0000-0001-7113-5197"},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Mohsen Raji","raw_affiliation_strings":["Amirkabir University of Technology\uc2a0, Tehran, Iran","Amirkabir University of Technology, Tehran,"],"affiliations":[{"raw_affiliation_string":"Amirkabir University of Technology\uc2a0, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]},{"raw_affiliation_string":"Amirkabir University of Technology, Tehran,","institution_ids":["https://openalex.org/I158248296"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028010546","display_name":"Behnam Ghavami","orcid":"https://orcid.org/0000-0001-5391-383X"},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Behnam Ghavami","raw_affiliation_strings":["Amirkabir University of Technology\uc2a0, Tehran, Iran","Amirkabir University of Technology, Tehran,"],"affiliations":[{"raw_affiliation_string":"Amirkabir University of Technology\uc2a0, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]},{"raw_affiliation_string":"Amirkabir University of Technology, Tehran,","institution_ids":["https://openalex.org/I158248296"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085021768","display_name":"Hossein Pedram","orcid":"https://orcid.org/0000-0002-2331-0568"},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Hossein Pedram","raw_affiliation_strings":["Amirkabir University of Technology\uc2a0, Tehran, Iran","Amirkabir University of Technology, Tehran,"],"affiliations":[{"raw_affiliation_string":"Amirkabir University of Technology\uc2a0, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]},{"raw_affiliation_string":"Amirkabir University of Technology, Tehran,","institution_ids":["https://openalex.org/I158248296"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5078040742"],"corresponding_institution_ids":["https://openalex.org/I158248296"],"apc_list":null,"apc_paid":null,"fwci":0.9122,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77415218,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"291","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8680794835090637},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7771411538124084},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.7557674646377563},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6269788146018982},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6100794076919556},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6065965294837952},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.5307899117469788},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.521939218044281},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4388279318809509},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4109160304069519},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3622801899909973},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.2743346691131592},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.16179728507995605},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09884604811668396},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09002476930618286},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.08737456798553467}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8680794835090637},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7771411538124084},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.7557674646377563},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6269788146018982},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6100794076919556},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6065965294837952},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.5307899117469788},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.521939218044281},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4388279318809509},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4109160304069519},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3622801899909973},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.2743346691131592},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.16179728507995605},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09884604811668396},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09002476930618286},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.08737456798553467},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810310","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810310","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W16511050","https://openalex.org/W1530625153","https://openalex.org/W1574236348","https://openalex.org/W1723577572","https://openalex.org/W1829133288","https://openalex.org/W1937545609","https://openalex.org/W1993742654","https://openalex.org/W2031850491","https://openalex.org/W2102159907","https://openalex.org/W2102326977","https://openalex.org/W2108454771","https://openalex.org/W2112450612","https://openalex.org/W2123196056","https://openalex.org/W2126142231","https://openalex.org/W2131829751","https://openalex.org/W2136922322","https://openalex.org/W2140925931","https://openalex.org/W2153526788","https://openalex.org/W2158750015","https://openalex.org/W2163262735","https://openalex.org/W2165873073","https://openalex.org/W2168908441","https://openalex.org/W4230398107","https://openalex.org/W4243962819","https://openalex.org/W4285719527","https://openalex.org/W4299507296","https://openalex.org/W6634308084","https://openalex.org/W6638744798","https://openalex.org/W6641884055","https://openalex.org/W6676796786","https://openalex.org/W6679349518"],"related_works":["https://openalex.org/W2186297855","https://openalex.org/W1535144007","https://openalex.org/W2170950544","https://openalex.org/W2362706271","https://openalex.org/W2146990170","https://openalex.org/W1574287575","https://openalex.org/W2237508561","https://openalex.org/W2127888129","https://openalex.org/W2113765439","https://openalex.org/W2104461060"],"abstract_inverted_index":{"Asynchronous":[0,133],"logic":[1],"is":[2,49,156,174],"a":[3,50,101,121],"hot":[4],"topic":[5],"due":[6],"to":[7,18,40,87,96,99,103,124],"its":[8],"interesting":[9],"features":[10],"of":[11,22,25,31,59,68,71,77,84,90,107,128,149,152,160,180],"power":[12],"saving,":[13],"low":[14],"noise":[15],"and":[16,34,57,74,170],"robustness":[17],"parameters":[19,70],"variations.":[20],"Beside":[21],"the":[23,29,44,63,82,104,111,126,145,150,161,171,177,181],"benefits":[24],"asynchronous":[26,60,91,108,130],"design":[27,33,55],"technique,":[28],"lack":[30],"automatic":[32,54],"analysis":[35,48,89,106],"tools":[36],"made":[37],"it":[38,94],"hard":[39],"apply":[41],"them":[42],"in":[43,53,113],"new":[45],"designs.":[46],"Timing":[47],"necessary":[51,98],"step":[52],"process":[56,69,114],"optimization":[58],"circuits.":[61,92],"On":[62],"other":[64],"hand,":[65],"increasing":[66],"variation":[67,112],"integrated":[72],"circuits":[73,109,131],"more":[75],"sensitivity":[76],"today's":[78],"designs":[79],"has":[80,135],"increased":[81],"necessity":[83],"statistical":[85],"approach":[86],"timing":[88],"So":[93],"seems":[95],"be":[97],"introduce":[100],"method":[102,123],"performance":[105,127],"considering":[110],"parameters.":[115],"In":[116],"this":[117,143],"paper,":[118],"we":[119],"present":[120],"novel":[122],"analyze":[125],"template-based":[129],"statistically.":[132],"circuit":[134],"been":[136],"modeled":[137],"using":[138],"Variant-Timed":[139],"Petri-Net.":[140],"Based":[141],"on":[142],"model,":[144],"probability":[146],"density":[147],"function":[148],"delay":[151],"global":[153],"critical":[154],"cycle":[155],"calculated.":[157],"The":[158],"results":[159,169],"experiments":[162],"are":[163],"compared":[164],"with":[165],"Mont":[166],"Carlo":[167],"simulation-based":[168],"average":[172],"error":[173],"%2.8":[175],"for":[176],"mean":[178],"value":[179],"delays.":[182]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-29T08:15:47.926485","created_date":"2025-10-10T00:00:00"}