{"id":"https://openalex.org/W2113104196","doi":"https://doi.org/10.1109/isqed.2009.4810288","title":"On-chip transistor characterization arrays with digital interfaces for variability characterization","display_name":"On-chip transistor characterization arrays with digital interfaces for variability characterization","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2113104196","doi":"https://doi.org/10.1109/isqed.2009.4810288","mag":"2113104196"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810288","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810288","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090014947","display_name":"Simeon Realov","orcid":null},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Simeon Realov","raw_affiliation_strings":["Department of Electrical Engineering, Columbia University, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010343450","display_name":"William McLaughlin","orcid":null},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"William McLaughlin","raw_affiliation_strings":["Department of Electrical Engineering, Columbia University, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002706979","display_name":"Kenneth L. Shepard","orcid":"https://orcid.org/0000-0003-0665-6775"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. L. Shepard","raw_affiliation_strings":["Department of Electrical Engineering, Columbia University, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5090014947"],"corresponding_institution_ids":["https://openalex.org/I78577930"],"apc_list":null,"apc_paid":null,"fwci":0.5276,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.67745437,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"24","issue":null,"first_page":"167","last_page":"171"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/characterization","display_name":"Characterization (materials science)","score":0.6887818574905396},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6178837418556213},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.544154703617096},{"id":"https://openalex.org/keywords/principal-component-analysis","display_name":"Principal component analysis","score":0.5063668489456177},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.465224951505661},{"id":"https://openalex.org/keywords/lithography","display_name":"Lithography","score":0.4449227452278137},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4317760467529297},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.41527649760246277},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.2864169180393219},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2454667091369629},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.22236287593841553},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2026941180229187},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.0814872682094574},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.06647789478302002}],"concepts":[{"id":"https://openalex.org/C2780841128","wikidata":"https://www.wikidata.org/wiki/Q5073781","display_name":"Characterization (materials science)","level":2,"score":0.6887818574905396},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6178837418556213},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.544154703617096},{"id":"https://openalex.org/C27438332","wikidata":"https://www.wikidata.org/wiki/Q2873","display_name":"Principal component analysis","level":2,"score":0.5063668489456177},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.465224951505661},{"id":"https://openalex.org/C204223013","wikidata":"https://www.wikidata.org/wiki/Q133036","display_name":"Lithography","level":2,"score":0.4449227452278137},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4317760467529297},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.41527649760246277},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.2864169180393219},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2454667091369629},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.22236287593841553},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2026941180229187},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0814872682094574},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.06647789478302002},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810288","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810288","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2119075450"],"related_works":["https://openalex.org/W3107994849","https://openalex.org/W1975632186","https://openalex.org/W3027745756","https://openalex.org/W3205213561","https://openalex.org/W2531880140","https://openalex.org/W2126145365","https://openalex.org/W4247143848","https://openalex.org/W2036609560","https://openalex.org/W346861917","https://openalex.org/W3024018414"],"abstract_inverted_index":{"An":[0],"on-chip":[1],"test-and-measurement":[2],"system":[3],"with":[4],"digital":[5],"interfaces":[6],"that":[7],"can":[8],"perform":[9],"device-level":[10],"characterization":[11],"of":[12,15,58,65],"large-dense":[13],"arrays":[14],"transistors":[16],"is":[17,32,51],"demonstrated":[18],"in":[19,84,95,101],"90-":[20,102],"and":[21,76,79,97,103],"65-nm":[22],"technologies.":[23,86],"The":[24],"collected":[25],"variability":[26],"data":[27],"from":[28,62],"the":[29],"90-nm":[30],"run":[31],"used":[33,52],"to":[34,43,53,74,92],"create":[35],"a":[36,55,63],"statistical":[37],"device":[38],"model":[39,99],"based":[40],"on":[41],"BSIM4.3":[42,67,96],"capture":[44],"random":[45,60],"variability.":[46],"Principal":[47],"component":[48],"analysis":[49],"(PCA)":[50],"extract":[54],"reduced":[56],"set":[57,64],"purely":[59],"variables":[61],"correlated":[66],"parameters.":[68],"Different":[69],"layout-dependent":[70,88],"systematic":[71,93],"effects,":[72],"related":[73],"poly-":[75],"active-flares,":[77],"STI-stress,":[78],"lithography":[80],"limitations,":[81],"are":[82,90],"examined":[83],"both":[85],"These":[87],"effects":[89],"mapped":[91],"shifts":[94],"BSIM4.4":[98],"parameters":[100],"65-nm,":[104],"respectively.":[105]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
