{"id":"https://openalex.org/W2117192003","doi":"https://doi.org/10.1109/isqed.2009.4810265","title":"Power &amp;amp; variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design","display_name":"Power &amp;amp; variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design","publication_year":2009,"publication_date":"2009-03-01","ids":{"openalex":"https://openalex.org/W2117192003","doi":"https://doi.org/10.1109/isqed.2009.4810265","mag":"2117192003"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2009.4810265","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810265","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074449934","display_name":"R. Venkatraman","orcid":"https://orcid.org/0000-0003-4026-330X"},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Venkatraman","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062107205","display_name":"R. Castagnetti","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Castagnetti","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063626019","display_name":"A. Teene","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Teene","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027957562","display_name":"B. Mbouombouo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Mbouombouo","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042000236","display_name":"S. Ramesh","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119403","display_name":"LSI Solutions (United States)","ror":"https://ror.org/02st8gf30","country_code":"US","type":"company","lineage":["https://openalex.org/I4210119403"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Ramesh","raw_affiliation_strings":["LSI Corporation, Milpitas, CA, USA","LSI Corp., Milpitas, CA, USA"],"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA, USA","institution_ids":[]},{"raw_affiliation_string":"LSI Corp., Milpitas, CA, USA","institution_ids":["https://openalex.org/I4210119403"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5074449934"],"corresponding_institution_ids":["https://openalex.org/I4210119403"],"apc_list":null,"apc_paid":null,"fwci":0.2991,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.63892494,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"27","last_page":"32"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.6327170729637146},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6110143661499023},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5294278264045715},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5009016990661621},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.49831414222717285},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.4980897903442383},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.49223557114601135},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4698297679424286},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45314982533454895},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.43372684717178345},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.42721936106681824},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.41898778080940247},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3535565733909607},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3428477942943573},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09436997771263123}],"concepts":[{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.6327170729637146},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6110143661499023},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5294278264045715},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5009016990661621},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.49831414222717285},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.4980897903442383},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.49223557114601135},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4698297679424286},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45314982533454895},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.43372684717178345},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.42721936106681824},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.41898778080940247},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3535565733909607},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3428477942943573},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09436997771263123},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2009.4810265","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2009.4810265","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 10th International Symposium on Quality of Electronic Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2033443176","https://openalex.org/W2106750098","https://openalex.org/W2107461595","https://openalex.org/W2110134128","https://openalex.org/W4238927715"],"related_works":["https://openalex.org/W2906861169","https://openalex.org/W1742462572","https://openalex.org/W4253195573","https://openalex.org/W2020934033","https://openalex.org/W2348831282","https://openalex.org/W3030217714","https://openalex.org/W63276784","https://openalex.org/W3009549681","https://openalex.org/W3011978806","https://openalex.org/W2149099062"],"abstract_inverted_index":{"We":[0],"describe":[1],"here,":[2],"the":[3,22,25,49,77,82,87,110,134,176,182,185,199,207],"design":[4,107],"and":[5,14,19,29,33,56,58,66,101,160,165],"use":[6,88,111,206],"of":[7,27,52,64,81,89,112,129,136,163,174,187],"a":[8,41,62,104],"unique":[9],"test":[10,37],"chip":[11,83],"on":[12],"power":[13,31,55,122,130,146],"variability":[15,53,168,214],"(TPV)":[16],"to":[17,75,149,198,205,210],"measure":[18],"report":[20],"for":[21,179],"first":[23],"time,":[24],"magnitude":[26,197],"leakage":[28],"dynamic":[30],"dissipation":[32],"its":[34],"variation.":[35],"This":[36],"chip,":[38],"fabricated":[39],"in":[40,54,126,140,196,217],"state-of-the-art":[42,105],"45":[43],"nm":[44],"process":[45],"node":[46],"technology,":[47],"addresses":[48],"important":[50],"issues":[51],"delay":[57,167,213],"quantifies":[59],"them":[60],"as":[61],"function":[63],"voltage":[65,138,178],"cycle":[67],"time.":[68],"Multiple":[69],"power-saving":[70],"techniques":[71],"are":[72,97],"implemented":[73],"on-chip":[74,212],"facilitate":[76],"analysis.":[78],"The":[79],"uniqueness":[80],"lies":[84],"in:":[85],"a)":[86],"64":[90],"AES":[91],"core-based":[92],"processing-element":[93],"(PE)":[94],"blocks":[95],"that":[96],"identical,":[98],"independently":[99],"controllable":[100],"designed":[102],"using":[103],"power-aware":[106],"flow,":[108],"b)":[109],"MTCMOS":[113],"switches":[114],"within":[115],"each":[116,141],"PE":[117,142],"block":[118,143],"combined":[119],"with":[120],"multiple":[121],"domains":[123],"which":[124,144,193],"results":[125],"excellent":[127],"granularity":[128],"measurements":[131,147,173],"and,":[132],"c)":[133],"implementation":[135],"separate":[137],"areas":[139],"enables":[145],"down":[148],"very":[150],"low":[151],"voltages.":[152],"Good":[153],"correlation":[154],"was":[155],"established":[156],"between":[157],"measured":[158],"data":[159],"simulations.":[161],"Estimates":[162],"within-die":[164,191],"die-to-die":[166,200],"were":[169,194],"also":[170],"quantified":[171],"through":[172],"Vddmin,":[175],"minimum":[177],"functionality.":[180],"For":[181],"silicon":[183],"tested,":[184],"analysis":[186],"Vddmin":[188,208],"revealed":[189],"significant":[190],"variations":[192,201],"similar":[195],"seen.":[202],"A":[203],"methodology":[204],"variation":[209],"estimate":[211],"is":[215],"described":[216],"detail.":[218]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
