{"id":"https://openalex.org/W2163719973","doi":"https://doi.org/10.1109/isqed.2008.4479787","title":"Adaptive Branch and Bound Using SAT to Estimate False Crosstalk","display_name":"Adaptive Branch and Bound Using SAT to Estimate False Crosstalk","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W2163719973","doi":"https://doi.org/10.1109/isqed.2008.4479787","mag":"2163719973"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2008.4479787","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479787","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020675149","display_name":"Murthy Palla","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Murthy Palla","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053724324","display_name":"Jens Bargfrede","orcid":"https://orcid.org/0000-0001-5974-4790"},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Bargfrede","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087893873","display_name":"Klaus Peter Koch","orcid":"https://orcid.org/0000-0003-4900-1250"},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Klaus Koch","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083499070","display_name":"W. Anheier","orcid":null},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Walter Anheier","raw_affiliation_strings":["University of Brethemen, Bremen, Germany"],"affiliations":[{"raw_affiliation_string":"University of Brethemen, Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071742136","display_name":"Rolf Drechsler","orcid":"https://orcid.org/0000-0002-9872-1740"},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rolf Drechsler","raw_affiliation_strings":["University of Brethemen, Bremen, Germany"],"affiliations":[{"raw_affiliation_string":"University of Brethemen, Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5020675149"],"corresponding_institution_ids":["https://openalex.org/I137594350"],"apc_list":null,"apc_paid":null,"fwci":1.3318,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.82830331,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"508","last_page":"513"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6862047910690308},{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.6415085792541504},{"id":"https://openalex.org/keywords/bounding-overwatch","display_name":"Bounding overwatch","score":0.6093852519989014},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5836221575737},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5660831928253174},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.5658449530601501},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5420171022415161},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.518858790397644},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4784836173057556},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32185035943984985},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2667503356933594},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1041308343410492},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10112902522087097}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6862047910690308},{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.6415085792541504},{"id":"https://openalex.org/C63584917","wikidata":"https://www.wikidata.org/wiki/Q333286","display_name":"Bounding overwatch","level":2,"score":0.6093852519989014},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5836221575737},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5660831928253174},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.5658449530601501},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5420171022415161},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.518858790397644},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4784836173057556},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32185035943984985},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2667503356933594},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1041308343410492},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10112902522087097},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2008.4479787","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479787","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1518705996","https://openalex.org/W1557244636","https://openalex.org/W2009051315","https://openalex.org/W2074068637","https://openalex.org/W2115445209","https://openalex.org/W2118300947","https://openalex.org/W2129260045","https://openalex.org/W2148151394","https://openalex.org/W4301264637"],"related_works":["https://openalex.org/W1980349267","https://openalex.org/W2098419840","https://openalex.org/W2140610743","https://openalex.org/W2116326546","https://openalex.org/W2097637358","https://openalex.org/W2130189791","https://openalex.org/W2151104031","https://openalex.org/W2765435638","https://openalex.org/W3134372534","https://openalex.org/W2121863912"],"abstract_inverted_index":{"Accurate":[0],"crosstalk":[1,31,53,86,136],"analysis":[2,11,137],"has":[3,54],"become":[4],"a":[5,61,76,91],"key":[6],"issue":[7],"in":[8,29,35],"static":[9],"timing":[10,21],"of":[12,23,42,47,121,134,145,152],"modern":[13],"deep-submicron":[14],"digital":[15],"circuits.":[16],"The":[17,40,150],"inherent":[18],"logic":[19,45],"and":[20,93,115],"properties":[22],"the":[24,30,44,48,84,113,122,132,156],"circuit":[25,49],"are":[26,127,160],"often":[27],"neglected":[28],"estimation":[32],"process":[33],"resulting":[34],"an":[36,104,139],"overly":[37],"pessimistic":[38],"analysis.":[39],"problem":[41],"considering":[43],"correlations":[46],"to":[50,67,81,129,138],"eliminate":[51],"false":[52,85,135],"been":[55],"widely":[56],"studied,":[57],"but":[58],"still":[59],"lacks":[60],"very":[62,94],"efficient":[63],"solution":[64],"also":[65,89],"due":[66],"its":[68],"NP-hard":[69],"nature.":[70],"In":[71],"this":[72,153],"paper,":[73],"we":[74],"propose":[75,90],"SAT":[77,123],"solver":[78],"based":[79],"approach":[80,154],"efficiently":[82],"solve":[83],"problem.":[87],"We":[88],"novel":[92],"powerful":[95],"bounding":[96,100],"technique":[97,107],"called":[98,108],"adaptive":[99],"as":[101,103],"well":[102],"aggressor":[105,110],"ordering":[106,111],"simple":[109],"for":[112],"branch":[114],"bound":[116],"method":[117],"running":[118],"on":[119,155],"top":[120],"solver.":[124],"These":[125],"techniques":[126],"proven":[128],"drastically":[130],"increase":[131],"speed":[133],"extent":[140],"that":[141],"nets":[142],"with":[143],"hundreds":[144],"aggressors":[146],"can":[147],"be":[148],"handled.":[149],"results":[151],"ISCAS89":[157],"benchmark":[158],"circuits":[159],"provided.":[161]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
