{"id":"https://openalex.org/W2097832112","doi":"https://doi.org/10.1109/isqed.2008.4479774","title":"Statistical Crosstalk Noise Analysis Using First Order Parameterized Approach for Aggressor Grouping","display_name":"Statistical Crosstalk Noise Analysis Using First Order Parameterized Approach for Aggressor Grouping","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W2097832112","doi":"https://doi.org/10.1109/isqed.2008.4479774","mag":"2097832112"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2008.4479774","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479774","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108870800","display_name":"Sachin Shrivastava","orcid":null},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]},{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["IN","US"],"is_corresponding":false,"raw_author_name":"Sachin Shrivastava","raw_affiliation_strings":["Cadence Design Systems (India) Private Limited, India","Cadence Design Syst. Pvt. Ltd., Delhi"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems (India) Private Limited, India","institution_ids":["https://openalex.org/I4210111610"]},{"raw_affiliation_string":"Cadence Design Syst. Pvt. Ltd., Delhi","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048990173","display_name":"Harindranath Parameswaran","orcid":null},"institutions":[{"id":"https://openalex.org/I4210111610","display_name":"Cadence Design Systems (India)","ror":"https://ror.org/027qdw603","country_code":"IN","type":"company","lineage":["https://openalex.org/I4210111610","https://openalex.org/I66217453"]},{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["IN","US"],"is_corresponding":false,"raw_author_name":"Harindranath Parameswaran","raw_affiliation_strings":["Cadence Design Systems (India) Private Limited, India","Cadence Design Syst. Pvt. Ltd., Delhi"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems (India) Private Limited, India","institution_ids":["https://openalex.org/I4210111610"]},{"raw_affiliation_string":"Cadence Design Syst. Pvt. Ltd., Delhi","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4744,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55884432,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"445","last_page":"449"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.7258870601654053},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6747000813484192},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5357775688171387},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4663732647895813},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.4200862944126129},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.4140566289424896},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3299030065536499},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.27434301376342773},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18899211287498474},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14705049991607666},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1152360737323761}],"concepts":[{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.7258870601654053},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6747000813484192},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5357775688171387},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4663732647895813},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.4200862944126129},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.4140566289424896},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3299030065536499},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.27434301376342773},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18899211287498474},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14705049991607666},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1152360737323761},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2008.4479774","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479774","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6200000047683716,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1529972356","https://openalex.org/W2102463881","https://openalex.org/W2103379604","https://openalex.org/W2126924212","https://openalex.org/W2129718992","https://openalex.org/W2158031022","https://openalex.org/W2158750015","https://openalex.org/W2163262735","https://openalex.org/W3151395323","https://openalex.org/W4231021655","https://openalex.org/W4241771809","https://openalex.org/W4248868326","https://openalex.org/W4289256183","https://openalex.org/W6631602685","https://openalex.org/W6641884055"],"related_works":["https://openalex.org/W2622826586","https://openalex.org/W2167472940","https://openalex.org/W4280525841","https://openalex.org/W2560789951","https://openalex.org/W2492758367","https://openalex.org/W2807571008","https://openalex.org/W4388636991","https://openalex.org/W1975375876","https://openalex.org/W2972114982","https://openalex.org/W4298625141"],"abstract_inverted_index":{"With":[0],"decreasing":[1],"process":[2,34,41,64,155],"nodes":[3,35],"and":[4,45,107,121,141,168,185],"increasing":[5,38],"design":[6,15],"density,":[7],"crosstalk":[8,26,54,72,85,104,139],"analysis":[9,27,83,105],"is":[10,28,68],"a":[11,87,98,133,173,188],"must":[12],"for":[13,43,71,93,101,162],"getting":[14],"closure":[16],"in":[17,30,48,60,86,118,138,151,165],"the":[18,32,61,114,152,159,170],"UDSM":[19],"era.":[20],"In":[21],"addition":[22],"to":[23,53,77,90,135,149],"this,":[24],"while":[25],"complex":[29],"itself,":[31],"new":[33],"are":[36],"showing":[37],"variations":[39,65,117,120],"of":[40,58,63,81,84,116,154,172],"parameters":[42],"devices":[44],"interconnect.":[46],"This":[47],"turn":[49],"adds":[50],"more":[51],"complexity":[52],"analysis.":[55],"Standard":[56],"techniques":[57,80,164,186],"factoring":[59],"effects":[62,115],"(corner-based":[66],"analysis)":[67],"particularly":[69],"ineffective":[70],"analysis,":[73],"so":[74],"we":[75],"need":[76],"look":[78,96,108,127],"at":[79,97,109,128],"statistical":[82,103],"manner":[88],"similar":[89],"that":[91,181],"used":[92],"timing.":[94],"We":[95,125,157,179],"basic":[99],"infrastructure":[100],"doing":[102],"-":[106,140],"how":[110,143],"it":[111],"can":[112,146],"incorporate":[113],"cell":[119],"on":[122,176],"aggressor":[123,129],"slew.":[124],"also":[126],"window":[130],"clustering":[131],"as":[132],"technique":[134,145],"reduce":[136],"pessimism":[137],"see":[142],"this":[144,166,183],"be":[147],"modified":[148],"take":[150],"effect":[153],"variations.":[156],"lay":[158],"theoretical":[160],"framework":[161,184],"these":[163],"paper,":[167],"show":[169,180],"results":[171],"prototype":[174],"implementation":[175],"real":[177],"designs.":[178],"using":[182],"shows":[187],"close":[189],"correlation":[190],"with":[191],"Monte-Carlo":[192],"simulations.":[193]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}