{"id":"https://openalex.org/W2142994374","doi":"https://doi.org/10.1109/isqed.2008.4479746","title":"Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations","display_name":"Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W2142994374","doi":"https://doi.org/10.1109/isqed.2008.4479746","mag":"2142994374"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2008.4479746","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479746","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081512326","display_name":"Sherif Abdulkader Tawfik","orcid":"https://orcid.org/0000-0003-3592-1419"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sherif A. Tawfik","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Madison, WI, USA","University of Wisconsin, Madison"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]},{"raw_affiliation_string":"University of Wisconsin, Madison","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042147600","display_name":"Volkan Kursun","orcid":"https://orcid.org/0000-0002-8050-1774"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Volkan Kursun","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Madison, WI, USA","University of Wisconsin, Madison"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]},{"raw_affiliation_string":"University of Wisconsin, Madison","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5081512326"],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":null,"apc_paid":null,"fwci":1.3562,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.82797506,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"311","last_page":"316"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6392195820808411},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5570300817489624},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.5457838773727417},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5375221967697144},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5298967957496643},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48055747151374817},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.308240681886673},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.272663950920105},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20974665880203247},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.11683949828147888}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6392195820808411},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5570300817489624},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.5457838773727417},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5375221967697144},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5298967957496643},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48055747151374817},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.308240681886673},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.272663950920105},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20974665880203247},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.11683949828147888}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isqed.2008.4479746","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479746","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-41314","is_oa":false,"landing_page_url":"http://repository.hkust.edu.hk/ir/Record/1783.1-41314","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference paper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1489111899","https://openalex.org/W1489322347","https://openalex.org/W2023553433","https://openalex.org/W2107701773","https://openalex.org/W2112340819","https://openalex.org/W2124438715","https://openalex.org/W2125117969","https://openalex.org/W2129750565","https://openalex.org/W2153865810"],"related_works":["https://openalex.org/W4315697128","https://openalex.org/W3102845713","https://openalex.org/W2971502891","https://openalex.org/W3205506801","https://openalex.org/W4280599700","https://openalex.org/W3183570023","https://openalex.org/W4382323155","https://openalex.org/W2016508734","https://openalex.org/W2588941787","https://openalex.org/W4241196849"],"abstract_inverted_index":{"Brute-force":[0],"sequential":[1,25,110],"circuits":[2,26,92,111,121],"with":[3,93,107,122],"reduced":[4,72,104],"clock":[5,64],"load":[6],"and":[7,33,55,66,78,85],"simpler":[8],"circuitry":[9],"are":[10,27,71],"widely":[11],"used":[12],"in":[13,44],"the":[14,51,57,63,67,91,101,108,114,120],"state-of-the-art":[15],"integrated":[16],"circuits.":[17],"In":[18],"this":[19],"paper,":[20],"new":[21,109],"brute-force":[22],"independent-gate":[23,52],"FinFET":[24,48,53],"evaluated":[28],"for":[29],"power":[30,61,70],"consumption,":[31,62],"speed,":[32],"noise":[34],"immunity":[35],"characteristics":[36],"at":[37],"different":[38,97],"process":[39,98],"corners":[40],"under":[41],"parameter":[42],"fluctuations":[43],"a":[45],"32":[46],"nm":[47],"technology.":[49],"With":[50],"latches":[54],"flip-flops,":[56],"total":[58],"active":[59],"mode":[60],"power,":[65],"average":[68],"leakage":[69],"by":[73,105],"up":[74],"to":[75,90,113,119],"47%,":[76],"32%,":[77],"37%,":[79],"respectively,":[80],"while":[81],"maintaining":[82],"similar":[83],"speed":[84],"data":[86],"stability":[87],"as":[88,117],"compared":[89,118],"tied-gate":[94,123],"FinFETs":[95],"across":[96],"corners.":[99],"Furthermore,":[100],"area":[102],"is":[103],"20%":[106],"due":[112],"smaller":[115],"transistors":[116],"FinFETs.":[124]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}